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@@ -377,13 +377,9 @@ static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
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ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
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ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
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} else {
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} else {
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- bool was_enabled = !(I915_READ(DEIMR) & DE_ERR_INT_IVB);
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-
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- /* Change the state _after_ we've read out the current one. */
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ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
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ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
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- if (!was_enabled &&
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- (I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe))) {
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+ if (I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) {
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DRM_ERROR("uncleared fifo underrun on pipe %c\n",
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DRM_ERROR("uncleared fifo underrun on pipe %c\n",
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pipe_name(pipe));
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pipe_name(pipe));
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}
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}
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@@ -461,14 +457,9 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
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ibx_enable_display_interrupt(dev_priv, SDE_ERROR_CPT);
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ibx_enable_display_interrupt(dev_priv, SDE_ERROR_CPT);
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} else {
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} else {
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- uint32_t tmp = I915_READ(SERR_INT);
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- bool was_enabled = !(I915_READ(SDEIMR) & SDE_ERROR_CPT);
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-
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- /* Change the state _after_ we've read out the current one. */
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ibx_disable_display_interrupt(dev_priv, SDE_ERROR_CPT);
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ibx_disable_display_interrupt(dev_priv, SDE_ERROR_CPT);
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- if (!was_enabled &&
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- (tmp & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder))) {
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+ if (I915_READ(SERR_INT) & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) {
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DRM_ERROR("uncleared pch fifo underrun on pch transcoder %c\n",
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DRM_ERROR("uncleared pch fifo underrun on pch transcoder %c\n",
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transcoder_name(pch_transcoder));
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transcoder_name(pch_transcoder));
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}
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}
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