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@@ -418,6 +418,8 @@ struct vcpu_vmx {
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u64 msr_host_kernel_gs_base;
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u64 msr_guest_kernel_gs_base;
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#endif
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+ u32 vm_entry_controls_shadow;
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+ u32 vm_exit_controls_shadow;
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/*
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* loaded_vmcs points to the VMCS currently used in this vcpu. For a
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* non-nested (L1) guest, it always points to vmcs01. For a nested
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@@ -1326,6 +1328,62 @@ static void vmcs_set_bits(unsigned long field, u32 mask)
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vmcs_writel(field, vmcs_readl(field) | mask);
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}
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+static inline void vm_entry_controls_init(struct vcpu_vmx *vmx, u32 val)
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+{
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+ vmcs_write32(VM_ENTRY_CONTROLS, val);
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+ vmx->vm_entry_controls_shadow = val;
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+}
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+
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+static inline void vm_entry_controls_set(struct vcpu_vmx *vmx, u32 val)
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+{
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+ if (vmx->vm_entry_controls_shadow != val)
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+ vm_entry_controls_init(vmx, val);
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+}
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+
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+static inline u32 vm_entry_controls_get(struct vcpu_vmx *vmx)
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+{
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+ return vmx->vm_entry_controls_shadow;
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+}
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+
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+
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+static inline void vm_entry_controls_setbit(struct vcpu_vmx *vmx, u32 val)
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+{
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+ vm_entry_controls_set(vmx, vm_entry_controls_get(vmx) | val);
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+}
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+
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+static inline void vm_entry_controls_clearbit(struct vcpu_vmx *vmx, u32 val)
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+{
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+ vm_entry_controls_set(vmx, vm_entry_controls_get(vmx) & ~val);
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+}
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+
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+static inline void vm_exit_controls_init(struct vcpu_vmx *vmx, u32 val)
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+{
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+ vmcs_write32(VM_EXIT_CONTROLS, val);
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+ vmx->vm_exit_controls_shadow = val;
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+}
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+
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+static inline void vm_exit_controls_set(struct vcpu_vmx *vmx, u32 val)
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+{
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+ if (vmx->vm_exit_controls_shadow != val)
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+ vm_exit_controls_init(vmx, val);
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+}
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+
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+static inline u32 vm_exit_controls_get(struct vcpu_vmx *vmx)
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+{
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+ return vmx->vm_exit_controls_shadow;
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+}
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+
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+
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+static inline void vm_exit_controls_setbit(struct vcpu_vmx *vmx, u32 val)
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+{
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+ vm_exit_controls_set(vmx, vm_exit_controls_get(vmx) | val);
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+}
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+
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+static inline void vm_exit_controls_clearbit(struct vcpu_vmx *vmx, u32 val)
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+{
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+ vm_exit_controls_set(vmx, vm_exit_controls_get(vmx) & ~val);
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+}
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+
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static void vmx_segment_cache_clear(struct vcpu_vmx *vmx)
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{
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vmx->segment_cache.bitmask = 0;
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@@ -1410,11 +1468,11 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
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vmcs_write32(EXCEPTION_BITMAP, eb);
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}
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-static void clear_atomic_switch_msr_special(unsigned long entry,
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- unsigned long exit)
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+static void clear_atomic_switch_msr_special(struct vcpu_vmx *vmx,
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+ unsigned long entry, unsigned long exit)
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{
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- vmcs_clear_bits(VM_ENTRY_CONTROLS, entry);
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- vmcs_clear_bits(VM_EXIT_CONTROLS, exit);
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+ vm_entry_controls_clearbit(vmx, entry);
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+ vm_exit_controls_clearbit(vmx, exit);
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}
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static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
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@@ -1425,14 +1483,15 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
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switch (msr) {
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case MSR_EFER:
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if (cpu_has_load_ia32_efer) {
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- clear_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
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+ clear_atomic_switch_msr_special(vmx,
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+ VM_ENTRY_LOAD_IA32_EFER,
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VM_EXIT_LOAD_IA32_EFER);
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return;
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}
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break;
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case MSR_CORE_PERF_GLOBAL_CTRL:
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if (cpu_has_load_perf_global_ctrl) {
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- clear_atomic_switch_msr_special(
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+ clear_atomic_switch_msr_special(vmx,
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VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
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VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
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return;
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@@ -1453,14 +1512,15 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
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vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
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}
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-static void add_atomic_switch_msr_special(unsigned long entry,
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- unsigned long exit, unsigned long guest_val_vmcs,
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- unsigned long host_val_vmcs, u64 guest_val, u64 host_val)
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+static void add_atomic_switch_msr_special(struct vcpu_vmx *vmx,
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+ unsigned long entry, unsigned long exit,
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+ unsigned long guest_val_vmcs, unsigned long host_val_vmcs,
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+ u64 guest_val, u64 host_val)
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{
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vmcs_write64(guest_val_vmcs, guest_val);
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vmcs_write64(host_val_vmcs, host_val);
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- vmcs_set_bits(VM_ENTRY_CONTROLS, entry);
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- vmcs_set_bits(VM_EXIT_CONTROLS, exit);
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+ vm_entry_controls_setbit(vmx, entry);
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+ vm_exit_controls_setbit(vmx, exit);
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}
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static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
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@@ -1472,7 +1532,8 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
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switch (msr) {
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case MSR_EFER:
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if (cpu_has_load_ia32_efer) {
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- add_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
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+ add_atomic_switch_msr_special(vmx,
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+ VM_ENTRY_LOAD_IA32_EFER,
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VM_EXIT_LOAD_IA32_EFER,
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GUEST_IA32_EFER,
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HOST_IA32_EFER,
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@@ -1482,7 +1543,7 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
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break;
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case MSR_CORE_PERF_GLOBAL_CTRL:
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if (cpu_has_load_perf_global_ctrl) {
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- add_atomic_switch_msr_special(
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+ add_atomic_switch_msr_special(vmx,
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VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
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VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL,
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GUEST_IA32_PERF_GLOBAL_CTRL,
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@@ -3182,14 +3243,10 @@ static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
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vmx_load_host_state(to_vmx(vcpu));
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vcpu->arch.efer = efer;
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if (efer & EFER_LMA) {
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- vmcs_write32(VM_ENTRY_CONTROLS,
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- vmcs_read32(VM_ENTRY_CONTROLS) |
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- VM_ENTRY_IA32E_MODE);
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+ vm_entry_controls_setbit(to_vmx(vcpu), VM_ENTRY_IA32E_MODE);
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msr->data = efer;
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} else {
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- vmcs_write32(VM_ENTRY_CONTROLS,
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- vmcs_read32(VM_ENTRY_CONTROLS) &
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- ~VM_ENTRY_IA32E_MODE);
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+ vm_entry_controls_clearbit(to_vmx(vcpu), VM_ENTRY_IA32E_MODE);
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msr->data = efer & ~EFER_LME;
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}
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@@ -3217,9 +3274,7 @@ static void enter_lmode(struct kvm_vcpu *vcpu)
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static void exit_lmode(struct kvm_vcpu *vcpu)
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{
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- vmcs_write32(VM_ENTRY_CONTROLS,
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- vmcs_read32(VM_ENTRY_CONTROLS)
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- & ~VM_ENTRY_IA32E_MODE);
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+ vm_entry_controls_clearbit(to_vmx(vcpu), VM_ENTRY_IA32E_MODE);
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vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA);
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}
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@@ -4346,10 +4401,11 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
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++vmx->nmsrs;
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}
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- vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
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+
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+ vm_exit_controls_init(vmx, vmcs_config.vmexit_ctrl);
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/* 22.2.1, 20.8.1 */
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- vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
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+ vm_entry_controls_init(vmx, vmcs_config.vmentry_ctrl);
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vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
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set_cr4_guest_host_mask(vmx);
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@@ -7759,12 +7815,12 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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exit_control = vmcs_config.vmexit_ctrl;
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if (vmcs12->pin_based_vm_exec_control & PIN_BASED_VMX_PREEMPTION_TIMER)
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exit_control |= VM_EXIT_SAVE_VMX_PREEMPTION_TIMER;
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- vmcs_write32(VM_EXIT_CONTROLS, exit_control);
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+ vm_exit_controls_init(vmx, exit_control);
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/* vmcs12's VM_ENTRY_LOAD_IA32_EFER and VM_ENTRY_IA32E_MODE are
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* emulated by vmx_set_efer(), below.
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*/
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- vmcs_write32(VM_ENTRY_CONTROLS,
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+ vm_entry_controls_init(vmx,
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(vmcs12->vm_entry_controls & ~VM_ENTRY_LOAD_IA32_EFER &
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~VM_ENTRY_IA32E_MODE) |
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(vmcs_config.vmentry_ctrl & ~VM_ENTRY_IA32E_MODE));
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@@ -8186,7 +8242,7 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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vmcs12->vm_entry_controls =
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(vmcs12->vm_entry_controls & ~VM_ENTRY_IA32E_MODE) |
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- (vmcs_read32(VM_ENTRY_CONTROLS) & VM_ENTRY_IA32E_MODE);
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+ (vm_entry_controls_get(to_vmx(vcpu)) & VM_ENTRY_IA32E_MODE);
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/* TODO: These cannot have changed unless we have MSR bitmaps and
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* the relevant bit asks not to trap the change */
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@@ -8390,6 +8446,8 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu)
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vcpu->cpu = cpu;
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put_cpu();
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+ vm_entry_controls_init(vmx, vmcs_read32(VM_ENTRY_CONTROLS));
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+ vm_exit_controls_init(vmx, vmcs_read32(VM_EXIT_CONTROLS));
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vmx_segment_cache_clear(vmx);
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/* if no vmcs02 cache requested, remove the one we used */
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