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@@ -298,7 +298,7 @@
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};
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/* Special CPG clocks */
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- cpg_clocks: cpg_clocks@0xe6150000 {
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+ cpg_clocks: clocks@ffc80000 {
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compatible = "renesas,r8a7779-cpg-clocks";
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reg = <0 0xffc80000 0 0x30>;
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clocks = <&extal_clk>;
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@@ -342,7 +342,7 @@
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};
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/* Gate clocks */
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- mstp0_clks: mstp0_clks {
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+ mstp0_clks: clocks@ffc80030 {
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compatible = "renesas,r8a7779-mstp-clocks",
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"renesas,cpg-mstp-clocks";
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reg = <0 0xffc80030 0 4>;
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@@ -379,7 +379,7 @@
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"scif1", "scif0", "i2c3", "i2c2", "i2c1",
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"i2c0";
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};
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- mstp1_clks: mstp1_clks {
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+ mstp1_clks: clocks@ffc80034 {
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compatible = "renesas,r8a7779-mstp-clocks",
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"renesas,cpg-mstp-clocks";
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reg = <0 0xffc80034 0 4>, <0 0xffc80044 0 4>;
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@@ -408,7 +408,7 @@
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"ether", "sata",
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"pcie", "vin3";
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};
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- mstp3_clks: mstp3_clks {
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+ mstp3_clks: clocks@ffc8003c {
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compatible = "renesas,r8a7779-mstp-clocks",
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"renesas,cpg-mstp-clocks";
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reg = <0 0xffc8003c 0 4>;
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