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@@ -295,25 +295,6 @@
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#define OSC_CLK (0xa04068)
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#define OSC_CLK (0xa04068)
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#define OSC_CLK_FORCE_CONTROL (0x8)
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#define OSC_CLK_FORCE_CONTROL (0x8)
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-/* SECURE boot registers */
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-#define LMPM_SECURE_BOOT_CONFIG_ADDR (0x100)
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-enum secure_boot_config_reg {
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- LMPM_SECURE_BOOT_CONFIG_INSPECTOR_BURNED_IN_OTP = 0x00000001,
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- LMPM_SECURE_BOOT_CONFIG_INSPECTOR_NOT_REQ = 0x00000002,
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-};
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-
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-#define LMPM_SECURE_BOOT_CPU1_STATUS_ADDR_B0 (0xA01E30)
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-#define LMPM_SECURE_BOOT_CPU1_STATUS_ADDR (0x1E30)
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-#define LMPM_SECURE_BOOT_CPU2_STATUS_ADDR (0x1E34)
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-enum secure_boot_status_reg {
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- LMPM_SECURE_BOOT_CPU_STATUS_VERF_STATUS = 0x00000001,
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- LMPM_SECURE_BOOT_CPU_STATUS_VERF_COMPLETED = 0x00000002,
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- LMPM_SECURE_BOOT_CPU_STATUS_VERF_SUCCESS = 0x00000004,
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- LMPM_SECURE_BOOT_CPU_STATUS_VERF_FAIL = 0x00000008,
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- LMPM_SECURE_BOOT_CPU_STATUS_SIGN_VERF_FAIL = 0x00000010,
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- LMPM_SECURE_BOOT_STATUS_SUCCESS = 0x00000003,
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-};
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-
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#define FH_UCODE_LOAD_STATUS (0x1AF0)
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#define FH_UCODE_LOAD_STATUS (0x1AF0)
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#define CSR_UCODE_LOAD_STATUS_ADDR (0x1E70)
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#define CSR_UCODE_LOAD_STATUS_ADDR (0x1E70)
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enum secure_load_status_reg {
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enum secure_load_status_reg {
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@@ -334,8 +315,6 @@ enum secure_load_status_reg {
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#define LMPM_SECURE_CPU1_HDR_MEM_SPACE (0x420000)
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#define LMPM_SECURE_CPU1_HDR_MEM_SPACE (0x420000)
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#define LMPM_SECURE_CPU2_HDR_MEM_SPACE (0x420400)
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#define LMPM_SECURE_CPU2_HDR_MEM_SPACE (0x420400)
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-#define LMPM_SECURE_TIME_OUT (100) /* 10 micro */
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-
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/* Rx FIFO */
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/* Rx FIFO */
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#define RXF_SIZE_ADDR (0xa00c88)
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#define RXF_SIZE_ADDR (0xa00c88)
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#define RXF_RD_D_SPACE (0xa00c40)
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#define RXF_RD_D_SPACE (0xa00c40)
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