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ARC: [plat-eznps] handle extra aux regs #2: kernel/entry exit

Preserve eflags and gpa1 aux during entry/exit into kernel as these
could be modified by kernel mode

These registers used by compare exchange instructions.
  - GPA1 is used for compare value,
  - EFLAGS got bit reflects atomic operation response.

EFLAGS is zeroed for each new user task so it won't get its
parent value.

Signed-off-by: Liav Rehana <liavr@mellanox.com>
Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Liav Rehana 8 years ago
parent
commit
28923f6b74
3 changed files with 33 additions and 0 deletions
  1. 24 0
      arch/arc/include/asm/entry-compact.h
  2. 5 0
      arch/arc/include/asm/ptrace.h
  3. 4 0
      arch/arc/kernel/process.c

+ 24 - 0
arch/arc/include/asm/entry-compact.h

@@ -192,6 +192,12 @@
 	PUSHAX	lp_start
 	PUSHAX	lp_start
 	PUSHAX	erbta
 	PUSHAX	erbta
 
 
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	PUSHAX  CTOP_AUX_GPA1
+	PUSHAX  CTOP_AUX_EFLAGS
+#endif
+
 	lr	r9, [ecr]
 	lr	r9, [ecr]
 	st      r9, [sp, PT_event]    /* EV_Trap expects r9 to have ECR */
 	st      r9, [sp, PT_event]    /* EV_Trap expects r9 to have ECR */
 .endm
 .endm
@@ -208,6 +214,12 @@
  * by hardware and that is not good.
  * by hardware and that is not good.
  *-------------------------------------------------------------*/
  *-------------------------------------------------------------*/
 .macro EXCEPTION_EPILOGUE
 .macro EXCEPTION_EPILOGUE
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	POPAX   CTOP_AUX_EFLAGS
+	POPAX   CTOP_AUX_GPA1
+#endif
+
 	POPAX	erbta
 	POPAX	erbta
 	POPAX	lp_start
 	POPAX	lp_start
 	POPAX	lp_end
 	POPAX	lp_end
@@ -265,6 +277,12 @@
 	PUSHAX	lp_end
 	PUSHAX	lp_end
 	PUSHAX	lp_start
 	PUSHAX	lp_start
 	PUSHAX	bta_l\LVL\()
 	PUSHAX	bta_l\LVL\()
+
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	PUSHAX  CTOP_AUX_GPA1
+	PUSHAX  CTOP_AUX_EFLAGS
+#endif
 .endm
 .endm
 
 
 /*--------------------------------------------------------------
 /*--------------------------------------------------------------
@@ -277,6 +295,12 @@
  * by hardware and that is not good.
  * by hardware and that is not good.
  *-------------------------------------------------------------*/
  *-------------------------------------------------------------*/
 .macro INTERRUPT_EPILOGUE  LVL
 .macro INTERRUPT_EPILOGUE  LVL
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	POPAX   CTOP_AUX_EFLAGS
+	POPAX   CTOP_AUX_GPA1
+#endif
+
 	POPAX	bta_l\LVL\()
 	POPAX	bta_l\LVL\()
 	POPAX	lp_start
 	POPAX	lp_start
 	POPAX	lp_end
 	POPAX	lp_end

+ 5 - 0
arch/arc/include/asm/ptrace.h

@@ -19,6 +19,11 @@
 #ifdef CONFIG_ISA_ARCOMPACT
 #ifdef CONFIG_ISA_ARCOMPACT
 struct pt_regs {
 struct pt_regs {
 
 
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	unsigned long eflags;	/* Extended FLAGS */
+	unsigned long gpa1;	/* General Purpose Aux */
+#endif
+
 	/* Real registers */
 	/* Real registers */
 	unsigned long bta;	/* bta_l1, bta_l2, erbta */
 	unsigned long bta;	/* bta_l1, bta_l2, erbta */
 
 

+ 4 - 0
arch/arc/kernel/process.c

@@ -234,6 +234,10 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp)
 	 */
 	 */
 	regs->status32 = STATUS_U_MASK | STATUS_L_MASK | ISA_INIT_STATUS_BITS;
 	regs->status32 = STATUS_U_MASK | STATUS_L_MASK | ISA_INIT_STATUS_BITS;
 
 
+#ifdef CONFIG_EZNPS_MTM_EXT
+	regs->eflags = 0;
+#endif
+
 	/* bogus seed values for debugging */
 	/* bogus seed values for debugging */
 	regs->lp_start = 0x10;
 	regs->lp_start = 0x10;
 	regs->lp_end = 0x80;
 	regs->lp_end = 0x80;