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@@ -239,6 +239,45 @@ static inline void cmo_account_page_fault(void)
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static inline void cmo_account_page_fault(void) { }
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#endif /* CONFIG_PPC_SMLPAR */
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+#ifdef CONFIG_PPC_STD_MMU
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+static void sanity_check_fault(bool is_write, unsigned long error_code)
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+{
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+ /*
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+ * For hash translation mode, we should never get a
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+ * PROTFAULT. Any update to pte to reduce access will result in us
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+ * removing the hash page table entry, thus resulting in a DSISR_NOHPTE
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+ * fault instead of DSISR_PROTFAULT.
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+ *
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+ * A pte update to relax the access will not result in a hash page table
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+ * entry invalidate and hence can result in DSISR_PROTFAULT.
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+ * ptep_set_access_flags() doesn't do a hpte flush. This is why we have
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+ * the special !is_write in the below conditional.
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+ *
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+ * For platforms that doesn't supports coherent icache and do support
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+ * per page noexec bit, we do setup things such that we do the
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+ * sync between D/I cache via fault. But that is handled via low level
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+ * hash fault code (hash_page_do_lazy_icache()) and we should not reach
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+ * here in such case.
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+ *
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+ * For wrong access that can result in PROTFAULT, the above vma->vm_flags
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+ * check should handle those and hence we should fall to the bad_area
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+ * handling correctly.
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+ *
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+ * For embedded with per page exec support that doesn't support coherent
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+ * icache we do get PROTFAULT and we handle that D/I cache sync in
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+ * set_pte_at while taking the noexec/prot fault. Hence this is WARN_ON
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+ * is conditional for server MMU.
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+ *
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+ * For radix, we can get prot fault for autonuma case, because radix
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+ * page table will have them marked noaccess for user.
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+ */
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+ if (!radix_enabled() && !is_write)
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+ WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
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+}
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+#else
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+static void sanity_check_fault(bool is_write, unsigned long error_code) { }
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+#endif /* CONFIG_PPC_STD_MMU */
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+
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/*
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* Define the correct "is_write" bit in error_code based
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* on the processor family
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@@ -306,6 +345,9 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
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return SIGBUS;
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}
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+ /* Additional sanity check(s) */
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+ sanity_check_fault(is_write, error_code);
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+
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/*
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* The kernel should never take an execute fault nor should it
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* take a page fault to a kernel address.
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@@ -441,39 +483,6 @@ good_area:
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if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
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return bad_area(regs, address);
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}
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-#ifdef CONFIG_PPC_STD_MMU
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- /*
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- * For hash translation mode, we should never get a
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- * PROTFAULT. Any update to pte to reduce access will result in us
|
|
|
- * removing the hash page table entry, thus resulting in a DSISR_NOHPTE
|
|
|
- * fault instead of DSISR_PROTFAULT.
|
|
|
- *
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- * A pte update to relax the access will not result in a hash page table
|
|
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- * entry invalidate and hence can result in DSISR_PROTFAULT.
|
|
|
- * ptep_set_access_flags() doesn't do a hpte flush. This is why we have
|
|
|
- * the special !is_write in the below conditional.
|
|
|
- *
|
|
|
- * For platforms that doesn't supports coherent icache and do support
|
|
|
- * per page noexec bit, we do setup things such that we do the
|
|
|
- * sync between D/I cache via fault. But that is handled via low level
|
|
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- * hash fault code (hash_page_do_lazy_icache()) and we should not reach
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- * here in such case.
|
|
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- *
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- * For wrong access that can result in PROTFAULT, the above vma->vm_flags
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- * check should handle those and hence we should fall to the bad_area
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- * handling correctly.
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- *
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- * For embedded with per page exec support that doesn't support coherent
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- * icache we do get PROTFAULT and we handle that D/I cache sync in
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- * set_pte_at while taking the noexec/prot fault. Hence this is WARN_ON
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- * is conditional for server MMU.
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- *
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- * For radix, we can get prot fault for autonuma case, because radix
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- * page table will have them marked noaccess for user.
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- */
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- if (!radix_enabled() && !is_write)
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- WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
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-#endif /* CONFIG_PPC_STD_MMU */
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/*
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* If for any reason at all we couldn't handle the fault,
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