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+/*
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+ * Nios2-specific parts of system setup
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+ *
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+ * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
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+ * Copyright (C) 2004 Microtronix Datacom Ltd.
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+ * Copyright (C) 2001 Vic Phillips <vic@microtronix.com>
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+ *
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ */
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+
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+#include <linux/export.h>
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+#include <linux/kernel.h>
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+#include <linux/mm.h>
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+#include <linux/sched.h>
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+#include <linux/console.h>
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+#include <linux/bootmem.h>
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+#include <linux/initrd.h>
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+#include <linux/of_fdt.h>
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+
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+#include <asm/mmu_context.h>
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+#include <asm/sections.h>
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+#include <asm/setup.h>
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+#include <asm/cpuinfo.h>
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+
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+unsigned long memory_start;
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+EXPORT_SYMBOL(memory_start);
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+
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+unsigned long memory_end;
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+EXPORT_SYMBOL(memory_end);
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+
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+unsigned long memory_size;
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+
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+static struct pt_regs fake_regs = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+ 0, 0, 0, 0, 0, 0,
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+ 0};
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+
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+/* Copy a short hook instruction sequence to the exception address */
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+static inline void copy_exception_handler(unsigned int addr)
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+{
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+ unsigned int start = (unsigned int) exception_handler_hook;
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+ volatile unsigned int tmp = 0;
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+
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+ if (start == addr) {
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+ /* The CPU exception address already points to the handler. */
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+ return;
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+ }
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+
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+ __asm__ __volatile__ (
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+ "ldw %2,0(%0)\n"
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+ "stw %2,0(%1)\n"
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+ "ldw %2,4(%0)\n"
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+ "stw %2,4(%1)\n"
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+ "ldw %2,8(%0)\n"
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+ "stw %2,8(%1)\n"
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+ "flushd 0(%1)\n"
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+ "flushd 4(%1)\n"
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+ "flushd 8(%1)\n"
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+ "flushi %1\n"
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+ "addi %1,%1,4\n"
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+ "flushi %1\n"
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+ "addi %1,%1,4\n"
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+ "flushi %1\n"
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+ "flushp\n"
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+ : /* no output registers */
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+ : "r" (start), "r" (addr), "r" (tmp)
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+ : "memory"
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+ );
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+}
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+
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+/* Copy the fast TLB miss handler */
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+static inline void copy_fast_tlb_miss_handler(unsigned int addr)
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+{
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+ unsigned int start = (unsigned int) fast_handler;
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+ unsigned int end = (unsigned int) fast_handler_end;
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+ volatile unsigned int tmp = 0;
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+
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+ __asm__ __volatile__ (
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+ "1:\n"
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+ " ldw %3,0(%0)\n"
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+ " stw %3,0(%1)\n"
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+ " flushd 0(%1)\n"
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+ " flushi %1\n"
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+ " flushp\n"
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+ " addi %0,%0,4\n"
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+ " addi %1,%1,4\n"
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+ " bne %0,%2,1b\n"
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+ : /* no output registers */
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+ : "r" (start), "r" (addr), "r" (end), "r" (tmp)
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+ : "memory"
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+ );
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+}
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+
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+/*
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+ * save args passed from u-boot, called from head.S
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+ *
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+ * @r4: NIOS magic
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+ * @r5: initrd start
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+ * @r6: initrd end or fdt
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+ * @r7: kernel command line
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+ */
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+asmlinkage void __init nios2_boot_init(unsigned r4, unsigned r5, unsigned r6,
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+ unsigned r7)
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+{
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+ unsigned dtb_passed = 0;
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+ char cmdline_passed[COMMAND_LINE_SIZE] = { 0, };
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+
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+#if defined(CONFIG_NIOS2_PASS_CMDLINE)
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+ if (r4 == 0x534f494e) { /* r4 is magic NIOS */
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+#if defined(CONFIG_BLK_DEV_INITRD)
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+ if (r5) { /* initramfs */
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+ initrd_start = r5;
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+ initrd_end = r6;
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+ }
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+#endif /* CONFIG_BLK_DEV_INITRD */
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+ dtb_passed = r6;
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+
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+ if (r7)
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+ strncpy(cmdline_passed, (char *)r7, COMMAND_LINE_SIZE);
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+ }
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+#endif
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+
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+ early_init_devtree((void *)dtb_passed);
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+
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+#ifndef CONFIG_CMDLINE_FORCE
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+ if (cmdline_passed[0])
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+ strncpy(boot_command_line, cmdline_passed, COMMAND_LINE_SIZE);
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+#ifdef CONFIG_NIOS2_CMDLINE_IGNORE_DTB
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+ else
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+ strncpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
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+#endif
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+#endif
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+}
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+
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+void __init setup_arch(char **cmdline_p)
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+{
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+ int bootmap_size;
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+
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+ console_verbose();
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+
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+ memory_start = PAGE_ALIGN((unsigned long)__pa(_end));
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+ memory_end = (unsigned long) CONFIG_NIOS2_MEM_BASE + memory_size;
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+
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+ init_mm.start_code = (unsigned long) _stext;
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+ init_mm.end_code = (unsigned long) _etext;
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+ init_mm.end_data = (unsigned long) _edata;
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+ init_mm.brk = (unsigned long) _end;
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+ init_task.thread.kregs = &fake_regs;
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+
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+ /* Keep a copy of command line */
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+ *cmdline_p = boot_command_line;
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+
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+ min_low_pfn = PFN_UP(memory_start);
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+ max_low_pfn = PFN_DOWN(memory_end);
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+ max_mapnr = max_low_pfn;
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+
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+ /*
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+ * give all the memory to the bootmap allocator, tell it to put the
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+ * boot mem_map at the start of memory
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+ */
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+ pr_debug("init_bootmem_node(?,%#lx, %#x, %#lx)\n",
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+ min_low_pfn, PFN_DOWN(PHYS_OFFSET), max_low_pfn);
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+ bootmap_size = init_bootmem_node(NODE_DATA(0),
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+ min_low_pfn, PFN_DOWN(PHYS_OFFSET),
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+ max_low_pfn);
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+
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+ /*
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+ * free the usable memory, we have to make sure we do not free
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+ * the bootmem bitmap so we then reserve it after freeing it :-)
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+ */
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+ pr_debug("free_bootmem(%#lx, %#lx)\n",
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+ memory_start, memory_end - memory_start);
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+ free_bootmem(memory_start, memory_end - memory_start);
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+
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+ /*
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+ * Reserve the bootmem bitmap itself as well. We do this in two
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+ * steps (first step was init_bootmem()) because this catches
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+ * the (very unlikely) case of us accidentally initializing the
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+ * bootmem allocator with an invalid RAM area.
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+ *
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+ * Arguments are start, size
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+ */
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+ pr_debug("reserve_bootmem(%#lx, %#x)\n", memory_start, bootmap_size);
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+ reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
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+
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+#ifdef CONFIG_BLK_DEV_INITRD
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+ if (initrd_start) {
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+ reserve_bootmem(virt_to_phys((void *)initrd_start),
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+ initrd_end - initrd_start, BOOTMEM_DEFAULT);
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+ }
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+#endif /* CONFIG_BLK_DEV_INITRD */
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+
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+ unflatten_and_copy_device_tree();
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+
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+ setup_cpuinfo();
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+
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+ copy_exception_handler(cpuinfo.exception_addr);
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+
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+ mmu_init();
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+
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+ copy_fast_tlb_miss_handler(cpuinfo.fast_tlb_miss_exc_addr);
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+
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+ /*
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+ * Initialize MMU context handling here because data from cpuinfo is
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+ * needed for this.
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+ */
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+ mmu_context_init();
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+
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+ /*
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+ * get kmalloc into gear
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+ */
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+ paging_init();
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+
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+#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
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+ conswitchp = &dummy_con;
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+#endif
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+}
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Ley Foon Tan