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@@ -72,15 +72,6 @@ static int sg_version_num = 30534; /* 2 digits for each component */
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#define ALL_LUNS_RETURNED 0x02
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#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
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#define RESTRICTED_LUNS_RETURNED 0x00
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-#define NVME_POWER_STATE_START_VALID 0x00
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-#define NVME_POWER_STATE_ACTIVE 0x01
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-#define NVME_POWER_STATE_IDLE 0x02
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-#define NVME_POWER_STATE_STANDBY 0x03
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-#define NVME_POWER_STATE_LU_CONTROL 0x07
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-#define POWER_STATE_0 0
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-#define POWER_STATE_1 1
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-#define POWER_STATE_2 2
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-#define POWER_STATE_3 3
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#define DOWNLOAD_SAVE_ACTIVATE 0x05
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#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
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#define ACTIVATE_DEFERRED_MICROCODE 0x0F
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@@ -1229,64 +1220,6 @@ static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
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/* Start Stop Unit Helper Functions */
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-static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
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- u8 pc, u8 pcmod, u8 start)
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-{
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- int res;
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- int nvme_sc;
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- struct nvme_id_ctrl *id_ctrl;
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- int lowest_pow_st; /* max npss = lowest power consumption */
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- unsigned ps_desired = 0;
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-
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- nvme_sc = nvme_identify_ctrl(ns->ctrl, &id_ctrl);
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- res = nvme_trans_status_code(hdr, nvme_sc);
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- if (res)
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- return res;
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-
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- lowest_pow_st = max(POWER_STATE_0, (int)(id_ctrl->npss - 1));
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- kfree(id_ctrl);
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-
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- switch (pc) {
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- case NVME_POWER_STATE_START_VALID:
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- /* Action unspecified if POWER CONDITION MODIFIER != 0 */
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- if (pcmod == 0 && start == 0x1)
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- ps_desired = POWER_STATE_0;
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- if (pcmod == 0 && start == 0x0)
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- ps_desired = lowest_pow_st;
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- break;
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- case NVME_POWER_STATE_ACTIVE:
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- /* Action unspecified if POWER CONDITION MODIFIER != 0 */
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- if (pcmod == 0)
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- ps_desired = POWER_STATE_0;
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- break;
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- case NVME_POWER_STATE_IDLE:
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- /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
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- if (pcmod == 0x0)
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- ps_desired = POWER_STATE_1;
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- else if (pcmod == 0x1)
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- ps_desired = POWER_STATE_2;
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- else if (pcmod == 0x2)
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- ps_desired = POWER_STATE_3;
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- break;
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- case NVME_POWER_STATE_STANDBY:
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- /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
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- if (pcmod == 0x0)
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- ps_desired = max(POWER_STATE_0, (lowest_pow_st - 2));
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- else if (pcmod == 0x1)
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- ps_desired = max(POWER_STATE_0, (lowest_pow_st - 1));
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- break;
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- case NVME_POWER_STATE_LU_CONTROL:
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- default:
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- res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
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- ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
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- SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
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- break;
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- }
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- nvme_sc = nvme_set_features(ns->ctrl, NVME_FEAT_POWER_MGMT, ps_desired, 0,
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- NULL);
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- return nvme_trans_status_code(hdr, nvme_sc);
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-}
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-
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static int nvme_trans_send_activate_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
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u8 buffer_id)
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{
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@@ -2235,11 +2168,10 @@ static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
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static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
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u8 *cmd)
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{
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- u8 immed, pcmod, pc, no_flush, start;
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+ u8 immed, pcmod, no_flush, start;
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immed = cmd[1] & 0x01;
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pcmod = cmd[3] & 0x0f;
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- pc = (cmd[4] & 0xf0) >> 4;
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no_flush = cmd[4] & 0x04;
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start = cmd[4] & 0x01;
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@@ -2254,8 +2186,8 @@ static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
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if (res)
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return res;
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}
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- /* Setup the expected power state transition */
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- return nvme_trans_power_state(ns, hdr, pc, pcmod, start);
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+
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+ return 0;
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}
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}
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