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@@ -128,8 +128,6 @@ ENDPROC(native_usergs_sysret64)
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* manipulation.
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*/
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.macro FIXUP_TOP_OF_STACK tmp offset=0
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- movq PER_CPU_VAR(old_rsp),\tmp
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- movq \tmp,RSP+\offset(%rsp)
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movq $__USER_DS,SS+\offset(%rsp)
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movq $__USER_CS,CS+\offset(%rsp)
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movq RIP+\offset(%rsp),\tmp /* get rip */
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@@ -139,8 +137,7 @@ ENDPROC(native_usergs_sysret64)
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.endm
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.macro RESTORE_TOP_OF_STACK tmp offset=0
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- movq RSP+\offset(%rsp),\tmp
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- movq \tmp,PER_CPU_VAR(old_rsp)
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+ /* nothing to do */
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.endm
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/*
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@@ -222,9 +219,6 @@ ENDPROC(native_usergs_sysret64)
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* Interrupts are off on entry.
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* Only called from user space.
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*
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- * XXX if we had a free scratch register we could save the RSP into the stack frame
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- * and report it properly in ps. Unfortunately we haven't.
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- *
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* When user can change the frames always force IRET. That is because
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* it deals with uncanonical addresses better. SYSRET has trouble
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* with them due to bugs in both AMD and Intel CPUs.
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@@ -253,11 +247,13 @@ GLOBAL(system_call_after_swapgs)
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*/
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ENABLE_INTERRUPTS(CLBR_NONE)
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ALLOC_PT_GPREGS_ON_STACK 8 /* +8: space for orig_ax */
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+ movq %rcx,RIP(%rsp)
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+ movq PER_CPU_VAR(old_rsp),%rcx
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+ movq %r11,EFLAGS(%rsp)
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+ movq %rcx,RSP(%rsp)
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+ movq_cfi rax,ORIG_RAX
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SAVE_C_REGS_EXCEPT_RAX_RCX_R11
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movq $-ENOSYS,RAX(%rsp)
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- movq_cfi rax,ORIG_RAX
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- movq %r11,EFLAGS(%rsp)
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- movq %rcx,RIP(%rsp)
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CFI_REL_OFFSET rip,RIP
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testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP)
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jnz tracesys
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@@ -293,7 +289,7 @@ ret_from_sys_call:
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CFI_REGISTER rip,rcx
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movq EFLAGS(%rsp),%r11
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/*CFI_REGISTER rflags,r11*/
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- movq PER_CPU_VAR(old_rsp), %rsp
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+ movq RSP(%rsp),%rsp
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/*
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* 64bit SYSRET restores rip from rcx,
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* rflags from r11 (but RF and VM bits are forced to 0),
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