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@@ -76,6 +76,7 @@
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#define ESDHC_STD_TUNING_EN (1 << 24)
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/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
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#define ESDHC_TUNING_START_TAP 0x1
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+#define ESDHC_TUNING_STEP_MASK 0x00070000
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#define ESDHC_TUNING_STEP_SHIFT 16
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/* pinctrl state */
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@@ -489,9 +490,11 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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m |= ESDHC_MIX_CTRL_FBCLK_SEL;
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tuning_ctrl = readl(host->ioaddr + ESDHC_TUNING_CTRL);
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tuning_ctrl |= ESDHC_STD_TUNING_EN | ESDHC_TUNING_START_TAP;
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- if (imx_data->boarddata.tuning_step)
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+ if (imx_data->boarddata.tuning_step) {
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+ tuning_ctrl &= ~ESDHC_TUNING_STEP_MASK;
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tuning_ctrl |= imx_data->boarddata.tuning_step << ESDHC_TUNING_STEP_SHIFT;
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- writel(tuning_ctrl, host->ioaddr + ESDHC_TUNING_CTRL);
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+ }
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+ writel(tuning_ctrl, host->ioaddr + ESDHC_TUNING_CTRL);
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} else {
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v &= ~ESDHC_MIX_CTRL_EXE_TUNE;
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}
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