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@@ -289,19 +289,23 @@ static void wil_target_reset(struct wil6210_priv *wil)
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S(RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT(6));
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/* car_perst_rst_src_n_mask */
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S(RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT(7));
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+ wmb(); /* order is important here */
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W(RGF_USER_MAC_CPU_0, BIT(1)); /* mac_cpu_man_rst */
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W(RGF_USER_USER_CPU_0, BIT(1)); /* user_cpu_man_rst */
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+ wmb(); /* order is important here */
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xFE000000);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003F);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000170);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xFFE7FC00);
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+ wmb(); /* order is important here */
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
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+ wmb(); /* order is important here */
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000001);
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if (rev_id == 1) {
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@@ -311,6 +315,7 @@ static void wil_target_reset(struct wil6210_priv *wil)
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
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}
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
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+ wmb(); /* order is important here */
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/* wait until device ready */
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do {
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@@ -327,6 +332,7 @@ static void wil_target_reset(struct wil6210_priv *wil)
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W(RGF_PCIE_LOS_COUNTER_CTL, BIT(8));
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C(RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
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+ wmb(); /* order is important here */
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wil_dbg_misc(wil, "Reset completed in %d ms\n", delay);
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