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@@ -21,8 +21,6 @@
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#include <dt-bindings/interrupt-controller/mvebu-icu.h>
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-#include "irq-mvebu-gicp.h"
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-
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/* ICU registers */
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#define ICU_SETSPI_NSR_AL 0x10
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#define ICU_SETSPI_NSR_AH 0x14
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@@ -43,6 +41,7 @@ struct mvebu_icu {
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void __iomem *base;
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struct irq_domain *domain;
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struct device *dev;
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+ atomic_t initialized;
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};
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struct mvebu_icu_irq_data {
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@@ -51,6 +50,18 @@ struct mvebu_icu_irq_data {
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unsigned int type;
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};
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+static void mvebu_icu_init(struct mvebu_icu *icu, struct msi_msg *msg)
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+{
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+ if (atomic_cmpxchg(&icu->initialized, false, true))
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+ return;
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+
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+ /* Set Clear/Set ICU SPI message address in AP */
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+ writel_relaxed(msg[0].address_hi, icu->base + ICU_SETSPI_NSR_AH);
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+ writel_relaxed(msg[0].address_lo, icu->base + ICU_SETSPI_NSR_AL);
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+ writel_relaxed(msg[1].address_hi, icu->base + ICU_CLRSPI_NSR_AH);
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+ writel_relaxed(msg[1].address_lo, icu->base + ICU_CLRSPI_NSR_AL);
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+}
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+
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static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
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{
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struct irq_data *d = irq_get_irq_data(desc->irq);
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@@ -59,6 +70,8 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
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unsigned int icu_int;
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if (msg->address_lo || msg->address_hi) {
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+ /* One off initialization */
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+ mvebu_icu_init(icu, msg);
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/* Configure the ICU with irq number & type */
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icu_int = msg->data | ICU_INT_ENABLE;
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if (icu_irqd->type & IRQ_TYPE_EDGE_RISING)
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@@ -197,9 +210,7 @@ static int mvebu_icu_probe(struct platform_device *pdev)
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struct device_node *node = pdev->dev.of_node;
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struct device_node *gicp_dn;
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struct resource *res;
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- phys_addr_t setspi, clrspi;
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- u32 i, icu_int;
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- int ret;
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+ int i;
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icu = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_icu),
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GFP_KERNEL);
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@@ -242,22 +253,12 @@ static int mvebu_icu_probe(struct platform_device *pdev)
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if (!gicp_dn)
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return -ENODEV;
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- ret = mvebu_gicp_get_doorbells(gicp_dn, &setspi, &clrspi);
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- if (ret)
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- return ret;
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-
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- /* Set Clear/Set ICU SPI message address in AP */
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- writel_relaxed(upper_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AH);
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- writel_relaxed(lower_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AL);
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- writel_relaxed(upper_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AH);
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- writel_relaxed(lower_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AL);
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-
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/*
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* Clean all ICU interrupts with type SPI_NSR, required to
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* avoid unpredictable SPI assignments done by firmware.
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*/
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for (i = 0 ; i < ICU_MAX_IRQS ; i++) {
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- icu_int = readl(icu->base + ICU_INT_CFG(i));
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+ u32 icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i));
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if ((icu_int >> ICU_GROUP_SHIFT) == ICU_GRP_NSR)
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writel_relaxed(0x0, icu->base + ICU_INT_CFG(i));
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}
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