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@@ -29,7 +29,6 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/list.h>
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#include <linux/bitops.h>
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#include <linux/bitops.h>
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-#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinconf-generic.h>
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@@ -119,8 +118,9 @@ static void amd_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value)
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static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
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static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
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unsigned debounce)
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unsigned debounce)
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{
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{
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- u32 pin_reg;
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u32 time;
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u32 time;
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+ u32 pin_reg;
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+ int ret = 0;
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unsigned long flags;
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unsigned long flags;
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struct amd_gpio *gpio_dev = to_amd_gpio(gc);
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struct amd_gpio *gpio_dev = to_amd_gpio(gc);
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@@ -166,7 +166,7 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
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pin_reg |= BIT(DB_TMR_LARGE_OFF);
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pin_reg |= BIT(DB_TMR_LARGE_OFF);
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} else {
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} else {
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pin_reg &= ~DB_CNTRl_MASK;
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pin_reg &= ~DB_CNTRl_MASK;
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- return -EINVAL;
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+ ret = -EINVAL;
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}
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}
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} else {
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} else {
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pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
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pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
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@@ -177,7 +177,7 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
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writel(pin_reg, gpio_dev->base + offset * 4);
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writel(pin_reg, gpio_dev->base + offset * 4);
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spin_unlock_irqrestore(&gpio_dev->lock, flags);
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spin_unlock_irqrestore(&gpio_dev->lock, flags);
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- return 0;
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+ return ret;
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}
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}
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#ifdef CONFIG_DEBUG_FS
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#ifdef CONFIG_DEBUG_FS
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@@ -463,14 +463,12 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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default:
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default:
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dev_err(&gpio_dev->pdev->dev, "Invalid type value\n");
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dev_err(&gpio_dev->pdev->dev, "Invalid type value\n");
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ret = -EINVAL;
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ret = -EINVAL;
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- goto exit;
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}
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}
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pin_reg |= CLR_INTR_STAT << INTERRUPT_STS_OFF;
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pin_reg |= CLR_INTR_STAT << INTERRUPT_STS_OFF;
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writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
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writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
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spin_unlock_irqrestore(&gpio_dev->lock, flags);
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spin_unlock_irqrestore(&gpio_dev->lock, flags);
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-exit:
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return ret;
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return ret;
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}
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}
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@@ -635,8 +633,9 @@ static int amd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *configs, unsigned num_configs)
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unsigned long *configs, unsigned num_configs)
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{
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{
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int i;
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int i;
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- u32 pin_reg;
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u32 arg;
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u32 arg;
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+ int ret = 0;
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+ u32 pin_reg;
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unsigned long flags;
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unsigned long flags;
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enum pin_config_param param;
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enum pin_config_param param;
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struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
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struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
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@@ -675,14 +674,14 @@ static int amd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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default:
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default:
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dev_err(&gpio_dev->pdev->dev,
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dev_err(&gpio_dev->pdev->dev,
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"Invalid config param %04x\n", param);
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"Invalid config param %04x\n", param);
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- return -ENOTSUPP;
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+ ret = -ENOTSUPP;
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}
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}
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writel(pin_reg, gpio_dev->base + pin*4);
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writel(pin_reg, gpio_dev->base + pin*4);
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}
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}
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spin_unlock_irqrestore(&gpio_dev->lock, flags);
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spin_unlock_irqrestore(&gpio_dev->lock, flags);
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- return 0;
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+ return ret;
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}
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}
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static int amd_pinconf_group_get(struct pinctrl_dev *pctldev,
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static int amd_pinconf_group_get(struct pinctrl_dev *pctldev,
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@@ -739,7 +738,7 @@ static struct pinctrl_desc amd_pinctrl_desc = {
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static int amd_gpio_probe(struct platform_device *pdev)
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static int amd_gpio_probe(struct platform_device *pdev)
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{
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{
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int ret = 0;
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int ret = 0;
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- u32 irq_base;
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+ int irq_base;
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struct resource *res;
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struct resource *res;
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struct amd_gpio *gpio_dev;
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struct amd_gpio *gpio_dev;
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