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@@ -142,7 +142,8 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
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return recv_bytes;
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}
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-#define HEADER_SIZE 4
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+#define BARE_ADDRESS_SIZE 3
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+#define HEADER_SIZE (BARE_ADDRESS_SIZE + 1)
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static ssize_t
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radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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@@ -160,13 +161,19 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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tx_buf[0] = msg->address & 0xff;
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tx_buf[1] = msg->address >> 8;
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tx_buf[2] = msg->request << 4;
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- tx_buf[3] = msg->size - 1;
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+ tx_buf[3] = msg->size ? (msg->size - 1) : 0;
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switch (msg->request & ~DP_AUX_I2C_MOT) {
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case DP_AUX_NATIVE_WRITE:
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case DP_AUX_I2C_WRITE:
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+ /* tx_size needs to be 4 even for bare address packets since the atom
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+ * table needs the info in tx_buf[3].
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+ */
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tx_size = HEADER_SIZE + msg->size;
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- tx_buf[3] |= tx_size << 4;
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+ if (msg->size == 0)
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+ tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
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+ else
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+ tx_buf[3] |= tx_size << 4;
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memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size);
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ret = radeon_process_aux_ch(chan,
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tx_buf, tx_size, NULL, 0, delay, &ack);
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@@ -176,8 +183,14 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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break;
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case DP_AUX_NATIVE_READ:
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case DP_AUX_I2C_READ:
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+ /* tx_size needs to be 4 even for bare address packets since the atom
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+ * table needs the info in tx_buf[3].
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+ */
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tx_size = HEADER_SIZE;
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- tx_buf[3] |= tx_size << 4;
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+ if (msg->size == 0)
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+ tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
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+ else
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+ tx_buf[3] |= tx_size << 4;
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ret = radeon_process_aux_ch(chan,
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tx_buf, tx_size, msg->buffer, msg->size, delay, &ack);
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break;
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@@ -186,7 +199,7 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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break;
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}
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- if (ret > 0)
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+ if (ret >= 0)
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msg->reply = ack >> 4;
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return ret;
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