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@@ -202,9 +202,9 @@ struct sdma_buffer_descriptor {
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/**
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* struct sdma_channel_control - Channel control Block
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*
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- * @current_bd_ptr current buffer descriptor processed
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- * @base_bd_ptr first element of buffer descriptor array
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- * @unused padding. The SDMA engine expects an array of 128 byte
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+ * @current_bd_ptr: current buffer descriptor processed
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+ * @base_bd_ptr: first element of buffer descriptor array
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+ * @unused: padding. The SDMA engine expects an array of 128 byte
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* control blocks
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*/
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struct sdma_channel_control {
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@@ -217,10 +217,13 @@ struct sdma_channel_control {
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* struct sdma_state_registers - SDMA context for a channel
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*
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* @pc: program counter
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+ * @unused1: unused
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* @t: test bit: status of arithmetic & test instruction
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* @rpc: return program counter
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+ * @unused0: unused
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* @sf: source fault while loading data
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* @spc: loop start program counter
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+ * @unused2: unused
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* @df: destination fault while storing data
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* @epc: loop end program counter
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* @lm: loop mode
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@@ -258,6 +261,14 @@ struct sdma_state_registers {
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* @dsa: dedicated core source address register
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* @ds: dedicated core status register
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* @dd: dedicated core data register
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+ * @scratch0: 1st word of dedicated ram for context switch
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+ * @scratch1: 2nd word of dedicated ram for context switch
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+ * @scratch2: 3rd word of dedicated ram for context switch
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+ * @scratch3: 4th word of dedicated ram for context switch
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+ * @scratch4: 5th word of dedicated ram for context switch
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+ * @scratch5: 6th word of dedicated ram for context switch
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+ * @scratch6: 7th word of dedicated ram for context switch
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+ * @scratch7: 8th word of dedicated ram for context switch
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*/
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struct sdma_context_data {
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struct sdma_state_registers channel_state;
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@@ -291,15 +302,16 @@ struct sdma_engine;
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/**
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* struct sdma_desc - descriptor structor for one transfer
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- * @vd descriptor for virt dma
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- * @num_bd max NUM_BD. number of descriptors currently handling
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- * @buf_tail ID of the buffer that was processed
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- * @buf_ptail ID of the previous buffer that was processed
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- * @period_len period length, used in cyclic.
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- * @chn_real_count the real count updated from bd->mode.count
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- * @chn_count the transfer count set
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- * @sdmac sdma_channel pointer
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- * @bd pointer of allocate bd
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+ * @vd: descriptor for virt dma
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+ * @num_bd: number of descriptors currently handling
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+ * @bd_phys: physical address of bd
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+ * @buf_tail: ID of the buffer that was processed
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+ * @buf_ptail: ID of the previous buffer that was processed
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+ * @period_len: period length, used in cyclic.
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+ * @chn_real_count: the real count updated from bd->mode.count
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+ * @chn_count: the transfer count set
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+ * @sdmac: sdma_channel pointer
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+ * @bd: pointer of allocate bd
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*/
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struct sdma_desc {
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struct virt_dma_desc vd;
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@@ -317,13 +329,30 @@ struct sdma_desc {
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/**
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* struct sdma_channel - housekeeping for a SDMA channel
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*
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- * @sdma pointer to the SDMA engine for this channel
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- * @channel the channel number, matches dmaengine chan_id + 1
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- * @direction transfer type. Needed for setting SDMA script
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- * @peripheral_type Peripheral type. Needed for setting SDMA script
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- * @event_id0 aka dma request line
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- * @event_id1 for channels that use 2 events
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- * @word_size peripheral access size
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+ * @vc: virt_dma base structure
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+ * @desc: sdma description including vd and other special member
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+ * @sdma: pointer to the SDMA engine for this channel
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+ * @channel: the channel number, matches dmaengine chan_id + 1
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+ * @direction: transfer type. Needed for setting SDMA script
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+ * @peripheral_type: Peripheral type. Needed for setting SDMA script
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+ * @event_id0: aka dma request line
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+ * @event_id1: for channels that use 2 events
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+ * @word_size: peripheral access size
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+ * @pc_from_device: script address for those device_2_memory
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+ * @pc_to_device: script address for those memory_2_device
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+ * @device_to_device: script address for those device_2_device
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+ * @flags: loop mode or not
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+ * @per_address: peripheral source or destination address in common case
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+ * destination address in p_2_p case
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+ * @per_address2: peripheral source address in p_2_p case
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+ * @event_mask: event mask used in p_2_p script
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+ * @watermark_level: value for gReg[7], some script will extend it from
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+ * basic watermark such as p_2_p
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+ * @shp_addr: value for gReg[6]
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+ * @per_addr: value for gReg[2]
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+ * @status: status of dma channel
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+ * @data: specific sdma interface structure
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+ * @bd_pool: dma_pool for bd
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*/
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struct sdma_channel {
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struct virt_dma_chan vc;
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@@ -359,15 +388,15 @@ struct sdma_channel {
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/**
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* struct sdma_firmware_header - Layout of the firmware image
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*
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- * @magic "SDMA"
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- * @version_major increased whenever layout of struct sdma_script_start_addrs
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- * changes.
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- * @version_minor firmware minor version (for binary compatible changes)
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- * @script_addrs_start offset of struct sdma_script_start_addrs in this image
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- * @num_script_addrs Number of script addresses in this image
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- * @ram_code_start offset of SDMA ram image in this firmware image
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- * @ram_code_size size of SDMA ram image
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- * @script_addrs Stores the start address of the SDMA scripts
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+ * @magic: "SDMA"
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+ * @version_major: increased whenever layout of struct
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+ * sdma_script_start_addrs changes.
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+ * @version_minor: firmware minor version (for binary compatible changes)
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+ * @script_addrs_start: offset of struct sdma_script_start_addrs in this image
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+ * @num_script_addrs: Number of script addresses in this image
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+ * @ram_code_start: offset of SDMA ram image in this firmware image
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+ * @ram_code_size: size of SDMA ram image
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+ * @script_addrs: Stores the start address of the SDMA scripts
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* (in SDMA memory space)
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*/
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struct sdma_firmware_header {
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