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@@ -22,7 +22,9 @@
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#include "octeon_iq.h"
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#include "response_manager.h"
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#include "octeon_device.h"
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+#include "octeon_nic.h"
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#include "octeon_main.h"
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+#include "octeon_network.h"
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#include "cn23xx_vf_device.h"
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MODULE_AUTHOR("Cavium Networks, <support@cavium.com>");
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@@ -30,6 +32,76 @@ MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Virtual Function
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MODULE_LICENSE("GPL");
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MODULE_VERSION(LIQUIDIO_VERSION);
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+static int debug = -1;
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+module_param(debug, int, 0644);
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+MODULE_PARM_DESC(debug, "NETIF_MSG debug bits");
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+
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+#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
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+
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+/* Bit mask values for lio->ifstate */
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+#define LIO_IFSTATE_DROQ_OPS 0x01
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+#define LIO_IFSTATE_REGISTERED 0x02
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+#define LIO_IFSTATE_RUNNING 0x04
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+
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+struct liquidio_if_cfg_context {
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+ int octeon_id;
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+
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+ wait_queue_head_t wc;
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+
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+ int cond;
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+};
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+
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+struct liquidio_if_cfg_resp {
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+ u64 rh;
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+ struct liquidio_if_cfg_info cfg_info;
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+ u64 status;
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+};
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+
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+struct liquidio_rx_ctl_context {
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+ int octeon_id;
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+
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+ wait_queue_head_t wc;
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+
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+ int cond;
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+};
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+
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+union tx_info {
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+ u64 u64;
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+ struct {
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+#ifdef __BIG_ENDIAN_BITFIELD
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+ u16 gso_size;
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+ u16 gso_segs;
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+ u32 reserved;
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+#else
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+ u32 reserved;
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+ u16 gso_segs;
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+ u16 gso_size;
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+#endif
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+ } s;
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+};
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+
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+#define OCTNIC_MAX_SG (MAX_SKB_FRAGS)
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+
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+#define OCTNIC_GSO_MAX_HEADER_SIZE 128
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+#define OCTNIC_GSO_MAX_SIZE \
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+ (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE)
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+
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+struct octnic_gather {
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+ /* List manipulation. Next and prev pointers. */
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+ struct list_head list;
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+
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+ /* Size of the gather component at sg in bytes. */
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+ int sg_size;
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+
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+ /* Number of bytes that sg was adjusted to make it 8B-aligned. */
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+ int adjust;
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+
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+ /* Gather component that can accommodate max sized fragment list
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+ * received from the IP layer.
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+ */
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+ struct octeon_sg_entry *sg;
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+};
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+
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struct octeon_device_priv {
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/* Tasklet structures for this device. */
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struct tasklet_struct droq_tasklet;
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@@ -40,6 +112,7 @@ static int
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liquidio_vf_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
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static void liquidio_vf_remove(struct pci_dev *pdev);
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static int octeon_device_init(struct octeon_device *oct);
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+static int liquidio_stop(struct net_device *netdev);
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static int lio_wait_for_oq_pkts(struct octeon_device *oct)
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{
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@@ -113,6 +186,375 @@ static struct pci_driver liquidio_vf_pci_driver = {
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.remove = liquidio_vf_remove,
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};
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+/**
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+ * \brief check interface state
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+ * @param lio per-network private data
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+ * @param state_flag flag state to check
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+ */
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+static int ifstate_check(struct lio *lio, int state_flag)
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+{
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+ return atomic_read(&lio->ifstate) & state_flag;
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+}
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+
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+/**
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+ * \brief set interface state
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+ * @param lio per-network private data
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+ * @param state_flag flag state to set
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+ */
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+static void ifstate_set(struct lio *lio, int state_flag)
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+{
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+ atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) | state_flag));
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+}
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+
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+/**
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+ * \brief clear interface state
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+ * @param lio per-network private data
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+ * @param state_flag flag state to clear
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+ */
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+static void ifstate_reset(struct lio *lio, int state_flag)
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+{
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+ atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) & ~(state_flag)));
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+}
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+
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+/**
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+ * \brief Stop Tx queues
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+ * @param netdev network device
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+ */
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+static void txqs_stop(struct net_device *netdev)
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+{
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+ if (netif_is_multiqueue(netdev)) {
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+ int i;
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+
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+ for (i = 0; i < netdev->num_tx_queues; i++)
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+ netif_stop_subqueue(netdev, i);
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+ } else {
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+ netif_stop_queue(netdev);
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+ }
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+}
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+
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+/**
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+ * \brief Start Tx queues
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+ * @param netdev network device
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+ */
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+static void txqs_start(struct net_device *netdev)
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+{
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+ if (netif_is_multiqueue(netdev)) {
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+ int i;
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+
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+ for (i = 0; i < netdev->num_tx_queues; i++)
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+ netif_start_subqueue(netdev, i);
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+ } else {
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+ netif_start_queue(netdev);
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+ }
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+}
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+
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+/**
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+ * \brief Wake Tx queues
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+ * @param netdev network device
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+ */
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+static void txqs_wake(struct net_device *netdev)
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+{
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+ struct lio *lio = GET_LIO(netdev);
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+
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+ if (netif_is_multiqueue(netdev)) {
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+ int i;
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+
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+ for (i = 0; i < netdev->num_tx_queues; i++) {
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+ int qno = lio->linfo.txpciq[i % (lio->linfo.num_txpciq)]
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+ .s.q_no;
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+ if (__netif_subqueue_stopped(netdev, i)) {
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+ INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno,
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+ tx_restart, 1);
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+ netif_wake_subqueue(netdev, i);
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+ }
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+ }
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+ } else {
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+ INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
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+ tx_restart, 1);
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+ netif_wake_queue(netdev);
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+ }
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+}
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+
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+/**
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+ * \brief Start Tx queue
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+ * @param netdev network device
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+ */
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+static void start_txq(struct net_device *netdev)
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+{
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+ struct lio *lio = GET_LIO(netdev);
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+
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+ if (lio->linfo.link.s.link_up) {
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+ txqs_start(netdev);
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+ return;
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+ }
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+}
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+
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+/**
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+ * \brief Wake a queue
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+ * @param netdev network device
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+ * @param q which queue to wake
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+ */
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+static void wake_q(struct net_device *netdev, int q)
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+{
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+ if (netif_is_multiqueue(netdev))
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+ netif_wake_subqueue(netdev, q);
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+ else
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+ netif_wake_queue(netdev);
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+}
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+
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+/**
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+ * \brief Stop a queue
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+ * @param netdev network device
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+ * @param q which queue to stop
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+ */
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+static void stop_q(struct net_device *netdev, int q)
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+{
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+ if (netif_is_multiqueue(netdev))
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+ netif_stop_subqueue(netdev, q);
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+ else
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+ netif_stop_queue(netdev);
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+}
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+
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+/**
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+ * Remove the node at the head of the list. The list would be empty at
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+ * the end of this call if there are no more nodes in the list.
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+ */
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+static struct list_head *list_delete_head(struct list_head *root)
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+{
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+ struct list_head *node;
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+
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+ if ((root->prev == root) && (root->next == root))
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+ node = NULL;
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+ else
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+ node = root->next;
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+
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+ if (node)
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+ list_del(node);
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+
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+ return node;
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+}
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+
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+/**
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+ * \brief Delete gather lists
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+ * @param lio per-network private data
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+ */
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+static void delete_glists(struct lio *lio)
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+{
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+ struct octnic_gather *g;
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+ int i;
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+
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+ if (!lio->glist)
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+ return;
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+
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+ for (i = 0; i < lio->linfo.num_txpciq; i++) {
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+ do {
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+ g = (struct octnic_gather *)
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+ list_delete_head(&lio->glist[i]);
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+ if (g) {
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+ if (g->sg)
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+ kfree((void *)((unsigned long)g->sg -
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+ g->adjust));
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+ kfree(g);
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+ }
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+ } while (g);
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+ }
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+
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+ kfree(lio->glist);
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+ kfree(lio->glist_lock);
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+}
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+
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+/**
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+ * \brief Setup gather lists
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+ * @param lio per-network private data
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+ */
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+static int setup_glists(struct lio *lio, int num_iqs)
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+{
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+ struct octnic_gather *g;
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+ int i, j;
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+
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+ lio->glist_lock =
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+ kzalloc(sizeof(*lio->glist_lock) * num_iqs, GFP_KERNEL);
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+ if (!lio->glist_lock)
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+ return 1;
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+
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+ lio->glist =
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+ kzalloc(sizeof(*lio->glist) * num_iqs, GFP_KERNEL);
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+ if (!lio->glist) {
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+ kfree(lio->glist_lock);
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+ return 1;
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+ }
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+
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+ for (i = 0; i < num_iqs; i++) {
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+ spin_lock_init(&lio->glist_lock[i]);
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+
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+ INIT_LIST_HEAD(&lio->glist[i]);
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+
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+ for (j = 0; j < lio->tx_qsize; j++) {
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+ g = kzalloc(sizeof(*g), GFP_KERNEL);
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+ if (!g)
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+ break;
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+
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+ g->sg_size = ((ROUNDUP4(OCTNIC_MAX_SG) >> 2) *
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+ OCT_SG_ENTRY_SIZE);
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+
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+ g->sg = kmalloc(g->sg_size + 8, GFP_KERNEL);
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+ if (!g->sg) {
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+ kfree(g);
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+ break;
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+ }
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+
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+ /* The gather component should be aligned on 64-bit
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+ * boundary
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+ */
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+ if (((unsigned long)g->sg) & 7) {
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+ g->adjust = 8 - (((unsigned long)g->sg) & 7);
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+ g->sg = (struct octeon_sg_entry *)
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+ ((unsigned long)g->sg + g->adjust);
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+ }
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+ list_add_tail(&g->list, &lio->glist[i]);
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+ }
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+
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+ if (j != lio->tx_qsize) {
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+ delete_glists(lio);
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+ return 1;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+/**
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+ * \brief Print link information
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+ * @param netdev network device
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+ */
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+static void print_link_info(struct net_device *netdev)
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+{
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+ struct lio *lio = GET_LIO(netdev);
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+
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+ if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) {
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+ struct oct_link_info *linfo = &lio->linfo;
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+
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+ if (linfo->link.s.link_up) {
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+ netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n",
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+ linfo->link.s.speed,
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+ (linfo->link.s.duplex) ? "Full" : "Half");
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+ } else {
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+ netif_info(lio, link, lio->netdev, "Link Down\n");
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+ }
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+ }
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+}
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+
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+/**
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+ * \brief Routine to notify MTU change
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+ * @param work work_struct data structure
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+ */
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+static void octnet_link_status_change(struct work_struct *work)
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+{
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+ struct cavium_wk *wk = (struct cavium_wk *)work;
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+ struct lio *lio = (struct lio *)wk->ctxptr;
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+
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+ rtnl_lock();
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+ call_netdevice_notifiers(NETDEV_CHANGEMTU, lio->netdev);
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+ rtnl_unlock();
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+}
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+
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+/**
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+ * \brief Sets up the mtu status change work
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+ * @param netdev network device
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+ */
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+static int setup_link_status_change_wq(struct net_device *netdev)
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+{
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+ struct lio *lio = GET_LIO(netdev);
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+ struct octeon_device *oct = lio->oct_dev;
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+
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+ lio->link_status_wq.wq = alloc_workqueue("link-status",
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+ WQ_MEM_RECLAIM, 0);
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+ if (!lio->link_status_wq.wq) {
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+ dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n");
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+ return -1;
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+ }
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+ INIT_DELAYED_WORK(&lio->link_status_wq.wk.work,
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+ octnet_link_status_change);
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+ lio->link_status_wq.wk.ctxptr = lio;
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+
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+ return 0;
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+}
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+
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+static void cleanup_link_status_change_wq(struct net_device *netdev)
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+{
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+ struct lio *lio = GET_LIO(netdev);
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+
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+ if (lio->link_status_wq.wq) {
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+ cancel_delayed_work_sync(&lio->link_status_wq.wk.work);
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+ destroy_workqueue(lio->link_status_wq.wq);
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+ }
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+}
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+
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+/**
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+ * \brief Update link status
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+ * @param netdev network device
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+ * @param ls link status structure
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+ *
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+ * Called on receipt of a link status response from the core application to
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+ * update each interface's link status.
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+ */
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+static void update_link_status(struct net_device *netdev,
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+ union oct_link_status *ls)
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+{
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+ struct lio *lio = GET_LIO(netdev);
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+ struct octeon_device *oct = lio->oct_dev;
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+
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+ if ((lio->intf_open) && (lio->linfo.link.u64 != ls->u64)) {
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+ lio->linfo.link.u64 = ls->u64;
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+
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+ print_link_info(netdev);
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+ lio->link_changes++;
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+
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+ if (lio->linfo.link.s.link_up) {
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+ netif_carrier_on(netdev);
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+ txqs_wake(netdev);
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+ } else {
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+ netif_carrier_off(netdev);
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|
|
+ txqs_stop(netdev);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (lio->linfo.link.s.mtu < netdev->mtu) {
|
|
|
+ dev_warn(&oct->pci_dev->dev,
|
|
|
+ "PF has changed the MTU for gmx port. Reducing the mtu from %d to %d\n",
|
|
|
+ netdev->mtu, lio->linfo.link.s.mtu);
|
|
|
+ lio->mtu = lio->linfo.link.s.mtu;
|
|
|
+ netdev->mtu = lio->linfo.link.s.mtu;
|
|
|
+ queue_delayed_work(lio->link_status_wq.wq,
|
|
|
+ &lio->link_status_wq.wk.work, 0);
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+static void update_txq_status(struct octeon_device *oct, int iq_num)
|
|
|
+{
|
|
|
+ struct octeon_instr_queue *iq = oct->instr_queue[iq_num];
|
|
|
+ struct net_device *netdev;
|
|
|
+ struct lio *lio;
|
|
|
+
|
|
|
+ netdev = oct->props[iq->ifidx].netdev;
|
|
|
+ lio = GET_LIO(netdev);
|
|
|
+ if (netif_is_multiqueue(netdev)) {
|
|
|
+ if (__netif_subqueue_stopped(netdev, iq->q_index) &&
|
|
|
+ lio->linfo.link.s.link_up &&
|
|
|
+ (!octnet_iq_is_full(oct, iq_num))) {
|
|
|
+ netif_wake_subqueue(netdev, iq->q_index);
|
|
|
+ INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq_num,
|
|
|
+ tx_restart, 1);
|
|
|
+ } else {
|
|
|
+ if (!octnet_iq_is_full(oct, lio->txq)) {
|
|
|
+ INCR_INSTRQUEUE_PKT_COUNT(
|
|
|
+ lio->oct_dev, lio->txq, tx_restart, 1);
|
|
|
+ wake_q(netdev, lio->txq);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
static
|
|
|
int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret)
|
|
|
{
|
|
@@ -316,6 +758,7 @@ static void octeon_destroy_resources(struct octeon_device *oct)
|
|
|
/* No more instructions will be forwarded. */
|
|
|
atomic_set(&oct->status, OCT_DEV_IN_RESET);
|
|
|
|
|
|
+ oct->app_mode = CVM_DRV_INVALID_APP;
|
|
|
dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
|
|
|
lio_get_state_string(&oct->status));
|
|
|
|
|
@@ -419,6 +862,174 @@ static void octeon_destroy_resources(struct octeon_device *oct)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
+/**
|
|
|
+ * \brief Callback for rx ctrl
|
|
|
+ * @param status status of request
|
|
|
+ * @param buf pointer to resp structure
|
|
|
+ */
|
|
|
+static void rx_ctl_callback(struct octeon_device *oct,
|
|
|
+ u32 status, void *buf)
|
|
|
+{
|
|
|
+ struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
|
|
|
+ struct liquidio_rx_ctl_context *ctx;
|
|
|
+
|
|
|
+ ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr;
|
|
|
+
|
|
|
+ oct = lio_get_device(ctx->octeon_id);
|
|
|
+ if (status)
|
|
|
+ dev_err(&oct->pci_dev->dev, "rx ctl instruction failed. Status: %llx\n",
|
|
|
+ CVM_CAST64(status));
|
|
|
+ WRITE_ONCE(ctx->cond, 1);
|
|
|
+
|
|
|
+ /* This barrier is required to be sure that the response has been
|
|
|
+ * written fully before waking up the handler
|
|
|
+ */
|
|
|
+ wmb();
|
|
|
+
|
|
|
+ wake_up_interruptible(&ctx->wc);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Send Rx control command
|
|
|
+ * @param lio per-network private data
|
|
|
+ * @param start_stop whether to start or stop
|
|
|
+ */
|
|
|
+static void send_rx_ctrl_cmd(struct lio *lio, int start_stop)
|
|
|
+{
|
|
|
+ struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
|
|
|
+ int ctx_size = sizeof(struct liquidio_rx_ctl_context);
|
|
|
+ struct liquidio_rx_ctl_context *ctx;
|
|
|
+ struct octeon_soft_command *sc;
|
|
|
+ union octnet_cmd *ncmd;
|
|
|
+ int retval;
|
|
|
+
|
|
|
+ if (oct->props[lio->ifidx].rx_on == start_stop)
|
|
|
+ return;
|
|
|
+
|
|
|
+ sc = (struct octeon_soft_command *)
|
|
|
+ octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE,
|
|
|
+ 16, ctx_size);
|
|
|
+
|
|
|
+ ncmd = (union octnet_cmd *)sc->virtdptr;
|
|
|
+ ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr;
|
|
|
+
|
|
|
+ WRITE_ONCE(ctx->cond, 0);
|
|
|
+ ctx->octeon_id = lio_get_device_id(oct);
|
|
|
+ init_waitqueue_head(&ctx->wc);
|
|
|
+
|
|
|
+ ncmd->u64 = 0;
|
|
|
+ ncmd->s.cmd = OCTNET_CMD_RX_CTL;
|
|
|
+ ncmd->s.param1 = start_stop;
|
|
|
+
|
|
|
+ octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3));
|
|
|
+
|
|
|
+ sc->iq_no = lio->linfo.txpciq[0].s.q_no;
|
|
|
+
|
|
|
+ octeon_prepare_soft_command(oct, sc, OPCODE_NIC,
|
|
|
+ OPCODE_NIC_CMD, 0, 0, 0);
|
|
|
+
|
|
|
+ sc->callback = rx_ctl_callback;
|
|
|
+ sc->callback_arg = sc;
|
|
|
+ sc->wait_time = 5000;
|
|
|
+
|
|
|
+ retval = octeon_send_soft_command(oct, sc);
|
|
|
+ if (retval == IQ_SEND_FAILED) {
|
|
|
+ netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n");
|
|
|
+ } else {
|
|
|
+ /* Sleep on a wait queue till the cond flag indicates that the
|
|
|
+ * response arrived or timed-out.
|
|
|
+ */
|
|
|
+ if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR)
|
|
|
+ return;
|
|
|
+ oct->props[lio->ifidx].rx_on = start_stop;
|
|
|
+ }
|
|
|
+
|
|
|
+ octeon_free_soft_command(oct, sc);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Destroy NIC device interface
|
|
|
+ * @param oct octeon device
|
|
|
+ * @param ifidx which interface to destroy
|
|
|
+ *
|
|
|
+ * Cleanup associated with each interface for an Octeon device when NIC
|
|
|
+ * module is being unloaded or if initialization fails during load.
|
|
|
+ */
|
|
|
+static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx)
|
|
|
+{
|
|
|
+ struct net_device *netdev = oct->props[ifidx].netdev;
|
|
|
+ struct napi_struct *napi, *n;
|
|
|
+ struct lio *lio;
|
|
|
+
|
|
|
+ if (!netdev) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n",
|
|
|
+ __func__, ifidx);
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ lio = GET_LIO(netdev);
|
|
|
+
|
|
|
+ dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n");
|
|
|
+
|
|
|
+ if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING)
|
|
|
+ liquidio_stop(netdev);
|
|
|
+
|
|
|
+ if (oct->props[lio->ifidx].napi_enabled == 1) {
|
|
|
+ list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
|
|
|
+ napi_disable(napi);
|
|
|
+
|
|
|
+ oct->props[lio->ifidx].napi_enabled = 0;
|
|
|
+
|
|
|
+ oct->droq[0]->ops.poll_mode = 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED)
|
|
|
+ unregister_netdev(netdev);
|
|
|
+
|
|
|
+ cleanup_link_status_change_wq(netdev);
|
|
|
+
|
|
|
+ delete_glists(lio);
|
|
|
+
|
|
|
+ free_netdev(netdev);
|
|
|
+
|
|
|
+ oct->props[ifidx].gmxport = -1;
|
|
|
+
|
|
|
+ oct->props[ifidx].netdev = NULL;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Stop complete NIC functionality
|
|
|
+ * @param oct octeon device
|
|
|
+ */
|
|
|
+static int liquidio_stop_nic_module(struct octeon_device *oct)
|
|
|
+{
|
|
|
+ struct lio *lio;
|
|
|
+ int i, j;
|
|
|
+
|
|
|
+ dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n");
|
|
|
+ if (!oct->ifcount) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n");
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+
|
|
|
+ spin_lock_bh(&oct->cmd_resp_wqlock);
|
|
|
+ oct->cmd_resp_state = OCT_DRV_OFFLINE;
|
|
|
+ spin_unlock_bh(&oct->cmd_resp_wqlock);
|
|
|
+
|
|
|
+ for (i = 0; i < oct->ifcount; i++) {
|
|
|
+ lio = GET_LIO(oct->props[i].netdev);
|
|
|
+ for (j = 0; j < lio->linfo.num_rxpciq; j++)
|
|
|
+ octeon_unregister_droq_ops(oct,
|
|
|
+ lio->linfo.rxpciq[j].s.q_no);
|
|
|
+ }
|
|
|
+
|
|
|
+ for (i = 0; i < oct->ifcount; i++)
|
|
|
+ liquidio_destroy_nic_device(oct, i);
|
|
|
+
|
|
|
+ dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
/**
|
|
|
* \brief Cleans up resources at unload time
|
|
|
* @param pdev PCI device structure
|
|
@@ -429,6 +1040,9 @@ static void liquidio_vf_remove(struct pci_dev *pdev)
|
|
|
|
|
|
dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n");
|
|
|
|
|
|
+ if (oct_dev->app_mode == CVM_DRV_NIC_APP)
|
|
|
+ liquidio_stop_nic_module(oct_dev);
|
|
|
+
|
|
|
/* Reset the octeon device and cleanup all memory allocated for
|
|
|
* the octeon device by driver.
|
|
|
*/
|
|
@@ -471,23 +1085,1474 @@ static int octeon_pci_os_setup(struct octeon_device *oct)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+static int skb_iq(struct lio *lio, struct sk_buff *skb)
|
|
|
+{
|
|
|
+ int q = 0;
|
|
|
+
|
|
|
+ if (netif_is_multiqueue(lio->netdev))
|
|
|
+ q = skb->queue_mapping % lio->linfo.num_txpciq;
|
|
|
+
|
|
|
+ return q;
|
|
|
+}
|
|
|
+
|
|
|
/**
|
|
|
- * \brief Device initialization for each Octeon device that is probed
|
|
|
- * @param octeon_dev octeon device
|
|
|
+ * \brief Check Tx queue state for a given network buffer
|
|
|
+ * @param lio per-network private data
|
|
|
+ * @param skb network buffer
|
|
|
*/
|
|
|
-static int octeon_device_init(struct octeon_device *oct)
|
|
|
+static int check_txq_state(struct lio *lio, struct sk_buff *skb)
|
|
|
{
|
|
|
- u32 rev_id;
|
|
|
- int j;
|
|
|
+ int q = 0, iq = 0;
|
|
|
|
|
|
- atomic_set(&oct->status, OCT_DEV_BEGIN_STATE);
|
|
|
+ if (netif_is_multiqueue(lio->netdev)) {
|
|
|
+ q = skb->queue_mapping;
|
|
|
+ iq = lio->linfo.txpciq[(q % (lio->linfo.num_txpciq))].s.q_no;
|
|
|
+ } else {
|
|
|
+ iq = lio->txq;
|
|
|
+ q = iq;
|
|
|
+ }
|
|
|
|
|
|
- /* Enable access to the octeon device and make its DMA capability
|
|
|
- * known to the OS.
|
|
|
- */
|
|
|
- if (octeon_pci_os_setup(oct))
|
|
|
- return 1;
|
|
|
- atomic_set(&oct->status, OCT_DEV_PCI_ENABLE_DONE);
|
|
|
+ if (octnet_iq_is_full(lio->oct_dev, iq))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ if (__netif_subqueue_stopped(lio->netdev, q)) {
|
|
|
+ INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, tx_restart, 1);
|
|
|
+ wake_q(lio->netdev, q);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 1;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Unmap and free network buffer
|
|
|
+ * @param buf buffer
|
|
|
+ */
|
|
|
+static void free_netbuf(void *buf)
|
|
|
+{
|
|
|
+ struct octnet_buf_free_info *finfo;
|
|
|
+ struct sk_buff *skb;
|
|
|
+ struct lio *lio;
|
|
|
+
|
|
|
+ finfo = (struct octnet_buf_free_info *)buf;
|
|
|
+ skb = finfo->skb;
|
|
|
+ lio = finfo->lio;
|
|
|
+
|
|
|
+ dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+
|
|
|
+ check_txq_state(lio, skb);
|
|
|
+
|
|
|
+ tx_buffer_free(skb);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Unmap and free gather buffer
|
|
|
+ * @param buf buffer
|
|
|
+ */
|
|
|
+static void free_netsgbuf(void *buf)
|
|
|
+{
|
|
|
+ struct octnet_buf_free_info *finfo;
|
|
|
+ struct octnic_gather *g;
|
|
|
+ struct sk_buff *skb;
|
|
|
+ int i, frags, iq;
|
|
|
+ struct lio *lio;
|
|
|
+
|
|
|
+ finfo = (struct octnet_buf_free_info *)buf;
|
|
|
+ skb = finfo->skb;
|
|
|
+ lio = finfo->lio;
|
|
|
+ g = finfo->g;
|
|
|
+ frags = skb_shinfo(skb)->nr_frags;
|
|
|
+
|
|
|
+ dma_unmap_single(&lio->oct_dev->pci_dev->dev,
|
|
|
+ g->sg[0].ptr[0], (skb->len - skb->data_len),
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+
|
|
|
+ i = 1;
|
|
|
+ while (frags--) {
|
|
|
+ struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
|
|
|
+
|
|
|
+ pci_unmap_page((lio->oct_dev)->pci_dev,
|
|
|
+ g->sg[(i >> 2)].ptr[(i & 3)],
|
|
|
+ frag->size, DMA_TO_DEVICE);
|
|
|
+ i++;
|
|
|
+ }
|
|
|
+
|
|
|
+ dma_unmap_single(&lio->oct_dev->pci_dev->dev,
|
|
|
+ finfo->dptr, g->sg_size,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+
|
|
|
+ iq = skb_iq(lio, skb);
|
|
|
+
|
|
|
+ spin_lock(&lio->glist_lock[iq]);
|
|
|
+ list_add_tail(&g->list, &lio->glist[iq]);
|
|
|
+ spin_unlock(&lio->glist_lock[iq]);
|
|
|
+
|
|
|
+ check_txq_state(lio, skb); /* mq support: sub-queue state check */
|
|
|
+
|
|
|
+ tx_buffer_free(skb);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Unmap and free gather buffer with response
|
|
|
+ * @param buf buffer
|
|
|
+ */
|
|
|
+static void free_netsgbuf_with_resp(void *buf)
|
|
|
+{
|
|
|
+ struct octnet_buf_free_info *finfo;
|
|
|
+ struct octeon_soft_command *sc;
|
|
|
+ struct octnic_gather *g;
|
|
|
+ struct sk_buff *skb;
|
|
|
+ int i, frags, iq;
|
|
|
+ struct lio *lio;
|
|
|
+
|
|
|
+ sc = (struct octeon_soft_command *)buf;
|
|
|
+ skb = (struct sk_buff *)sc->callback_arg;
|
|
|
+ finfo = (struct octnet_buf_free_info *)&skb->cb;
|
|
|
+
|
|
|
+ lio = finfo->lio;
|
|
|
+ g = finfo->g;
|
|
|
+ frags = skb_shinfo(skb)->nr_frags;
|
|
|
+
|
|
|
+ dma_unmap_single(&lio->oct_dev->pci_dev->dev,
|
|
|
+ g->sg[0].ptr[0], (skb->len - skb->data_len),
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+
|
|
|
+ i = 1;
|
|
|
+ while (frags--) {
|
|
|
+ struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
|
|
|
+
|
|
|
+ pci_unmap_page((lio->oct_dev)->pci_dev,
|
|
|
+ g->sg[(i >> 2)].ptr[(i & 3)],
|
|
|
+ frag->size, DMA_TO_DEVICE);
|
|
|
+ i++;
|
|
|
+ }
|
|
|
+
|
|
|
+ dma_unmap_single(&lio->oct_dev->pci_dev->dev,
|
|
|
+ finfo->dptr, g->sg_size,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+
|
|
|
+ iq = skb_iq(lio, skb);
|
|
|
+
|
|
|
+ spin_lock(&lio->glist_lock[iq]);
|
|
|
+ list_add_tail(&g->list, &lio->glist[iq]);
|
|
|
+ spin_unlock(&lio->glist_lock[iq]);
|
|
|
+
|
|
|
+ /* Don't free the skb yet */
|
|
|
+
|
|
|
+ check_txq_state(lio, skb);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Setup output queue
|
|
|
+ * @param oct octeon device
|
|
|
+ * @param q_no which queue
|
|
|
+ * @param num_descs how many descriptors
|
|
|
+ * @param desc_size size of each descriptor
|
|
|
+ * @param app_ctx application context
|
|
|
+ */
|
|
|
+static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs,
|
|
|
+ int desc_size, void *app_ctx)
|
|
|
+{
|
|
|
+ int ret_val;
|
|
|
+
|
|
|
+ dev_dbg(&oct->pci_dev->dev, "Creating Droq: %d\n", q_no);
|
|
|
+ /* droq creation and local register settings. */
|
|
|
+ ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx);
|
|
|
+ if (ret_val < 0)
|
|
|
+ return ret_val;
|
|
|
+
|
|
|
+ if (ret_val == 1) {
|
|
|
+ dev_dbg(&oct->pci_dev->dev, "Using default droq %d\n", q_no);
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Enable the droq queues */
|
|
|
+ octeon_set_droq_pkt_op(oct, q_no, 1);
|
|
|
+
|
|
|
+ /* Send Credit for Octeon Output queues. Credits are always
|
|
|
+ * sent after the output queue is enabled.
|
|
|
+ */
|
|
|
+ writel(oct->droq[q_no]->max_count, oct->droq[q_no]->pkts_credit_reg);
|
|
|
+
|
|
|
+ return ret_val;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Callback for getting interface configuration
|
|
|
+ * @param status status of request
|
|
|
+ * @param buf pointer to resp structure
|
|
|
+ */
|
|
|
+static void if_cfg_callback(struct octeon_device *oct,
|
|
|
+ u32 status __attribute__((unused)), void *buf)
|
|
|
+{
|
|
|
+ struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
|
|
|
+ struct liquidio_if_cfg_context *ctx;
|
|
|
+ struct liquidio_if_cfg_resp *resp;
|
|
|
+
|
|
|
+ resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
|
|
|
+ ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
|
|
|
+
|
|
|
+ oct = lio_get_device(ctx->octeon_id);
|
|
|
+ if (resp->status)
|
|
|
+ dev_err(&oct->pci_dev->dev, "nic if cfg instruction failed. Status: %llx\n",
|
|
|
+ CVM_CAST64(resp->status));
|
|
|
+ WRITE_ONCE(ctx->cond, 1);
|
|
|
+
|
|
|
+ snprintf(oct->fw_info.liquidio_firmware_version, 32, "%s",
|
|
|
+ resp->cfg_info.liquidio_firmware_version);
|
|
|
+
|
|
|
+ /* This barrier is required to be sure that the response has been
|
|
|
+ * written fully before waking up the handler
|
|
|
+ */
|
|
|
+ wmb();
|
|
|
+
|
|
|
+ wake_up_interruptible(&ctx->wc);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Select queue based on hash
|
|
|
+ * @param dev Net device
|
|
|
+ * @param skb sk_buff structure
|
|
|
+ * @returns selected queue number
|
|
|
+ */
|
|
|
+static u16 select_q(struct net_device *dev, struct sk_buff *skb,
|
|
|
+ void *accel_priv __attribute__((unused)),
|
|
|
+ select_queue_fallback_t fallback __attribute__((unused)))
|
|
|
+{
|
|
|
+ struct lio *lio;
|
|
|
+ u32 qindex;
|
|
|
+
|
|
|
+ lio = GET_LIO(dev);
|
|
|
+
|
|
|
+ qindex = skb_tx_hash(dev, skb);
|
|
|
+
|
|
|
+ return (u16)(qindex % (lio->linfo.num_txpciq));
|
|
|
+}
|
|
|
+
|
|
|
+/** Routine to push packets arriving on Octeon interface upto network layer.
|
|
|
+ * @param oct_id - octeon device id.
|
|
|
+ * @param skbuff - skbuff struct to be passed to network layer.
|
|
|
+ * @param len - size of total data received.
|
|
|
+ * @param rh - Control header associated with the packet
|
|
|
+ * @param param - additional control data with the packet
|
|
|
+ * @param arg - farg registered in droq_ops
|
|
|
+ */
|
|
|
+static void
|
|
|
+liquidio_push_packet(u32 octeon_id __attribute__((unused)),
|
|
|
+ void *skbuff,
|
|
|
+ u32 len,
|
|
|
+ union octeon_rh *rh,
|
|
|
+ void *param,
|
|
|
+ void *arg)
|
|
|
+{
|
|
|
+ struct napi_struct *napi = param;
|
|
|
+ struct octeon_droq *droq =
|
|
|
+ container_of(param, struct octeon_droq, napi);
|
|
|
+ struct net_device *netdev = (struct net_device *)arg;
|
|
|
+ struct sk_buff *skb = (struct sk_buff *)skbuff;
|
|
|
+
|
|
|
+ if (netdev) {
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ int packet_was_received;
|
|
|
+
|
|
|
+ /* Do not proceed if the interface is not in RUNNING state. */
|
|
|
+ if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) {
|
|
|
+ recv_buffer_free(skb);
|
|
|
+ droq->stats.rx_dropped++;
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ skb->dev = netdev;
|
|
|
+
|
|
|
+ skb_record_rx_queue(skb, droq->q_no);
|
|
|
+ if (likely(len > MIN_SKB_SIZE)) {
|
|
|
+ struct octeon_skb_page_info *pg_info;
|
|
|
+ unsigned char *va;
|
|
|
+
|
|
|
+ pg_info = ((struct octeon_skb_page_info *)(skb->cb));
|
|
|
+ if (pg_info->page) {
|
|
|
+ /* For Paged allocation use the frags */
|
|
|
+ va = page_address(pg_info->page) +
|
|
|
+ pg_info->page_offset;
|
|
|
+ memcpy(skb->data, va, MIN_SKB_SIZE);
|
|
|
+ skb_put(skb, MIN_SKB_SIZE);
|
|
|
+ skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
|
|
|
+ pg_info->page,
|
|
|
+ pg_info->page_offset +
|
|
|
+ MIN_SKB_SIZE,
|
|
|
+ len - MIN_SKB_SIZE,
|
|
|
+ LIO_RXBUFFER_SZ);
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ struct octeon_skb_page_info *pg_info =
|
|
|
+ ((struct octeon_skb_page_info *)(skb->cb));
|
|
|
+ skb_copy_to_linear_data(skb,
|
|
|
+ page_address(pg_info->page) +
|
|
|
+ pg_info->page_offset, len);
|
|
|
+ skb_put(skb, len);
|
|
|
+ put_page(pg_info->page);
|
|
|
+ }
|
|
|
+
|
|
|
+ skb_pull(skb, rh->r_dh.len * 8);
|
|
|
+ skb->protocol = eth_type_trans(skb, skb->dev);
|
|
|
+
|
|
|
+ if ((netdev->features & NETIF_F_RXCSUM) &&
|
|
|
+ (rh->r_dh.csum_verified & CNNIC_CSUM_VERIFIED))
|
|
|
+ /* checksum has already been verified */
|
|
|
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
|
|
|
+ else
|
|
|
+ skb->ip_summed = CHECKSUM_NONE;
|
|
|
+
|
|
|
+ packet_was_received = (napi_gro_receive(napi, skb) != GRO_DROP);
|
|
|
+
|
|
|
+ if (packet_was_received) {
|
|
|
+ droq->stats.rx_bytes_received += len;
|
|
|
+ droq->stats.rx_pkts_received++;
|
|
|
+ netdev->last_rx = jiffies;
|
|
|
+ } else {
|
|
|
+ droq->stats.rx_dropped++;
|
|
|
+ netif_info(lio, rx_err, lio->netdev,
|
|
|
+ "droq:%d error rx_dropped:%llu\n",
|
|
|
+ droq->q_no, droq->stats.rx_dropped);
|
|
|
+ }
|
|
|
+
|
|
|
+ } else {
|
|
|
+ recv_buffer_free(skb);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief callback when receive interrupt occurs and we are in NAPI mode
|
|
|
+ * @param arg pointer to octeon output queue
|
|
|
+ */
|
|
|
+static void liquidio_vf_napi_drv_callback(void *arg)
|
|
|
+{
|
|
|
+ struct octeon_droq *droq = arg;
|
|
|
+
|
|
|
+ napi_schedule_irqoff(&droq->napi);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Entry point for NAPI polling
|
|
|
+ * @param napi NAPI structure
|
|
|
+ * @param budget maximum number of items to process
|
|
|
+ */
|
|
|
+static int liquidio_napi_poll(struct napi_struct *napi, int budget)
|
|
|
+{
|
|
|
+ struct octeon_instr_queue *iq;
|
|
|
+ struct octeon_device *oct;
|
|
|
+ struct octeon_droq *droq;
|
|
|
+ int tx_done = 0, iq_no;
|
|
|
+ int work_done;
|
|
|
+
|
|
|
+ droq = container_of(napi, struct octeon_droq, napi);
|
|
|
+ oct = droq->oct_dev;
|
|
|
+ iq_no = droq->q_no;
|
|
|
+
|
|
|
+ /* Handle Droq descriptors */
|
|
|
+ work_done = octeon_process_droq_poll_cmd(oct, droq->q_no,
|
|
|
+ POLL_EVENT_PROCESS_PKTS,
|
|
|
+ budget);
|
|
|
+
|
|
|
+ /* Flush the instruction queue */
|
|
|
+ iq = oct->instr_queue[iq_no];
|
|
|
+ if (iq) {
|
|
|
+ /* Process iq buffers with in the budget limits */
|
|
|
+ tx_done = octeon_flush_iq(oct, iq, 1, budget);
|
|
|
+ /* Update iq read-index rather than waiting for next interrupt.
|
|
|
+ * Return back if tx_done is false.
|
|
|
+ */
|
|
|
+ update_txq_status(oct, iq_no);
|
|
|
+ } else {
|
|
|
+ dev_err(&oct->pci_dev->dev, "%s: iq (%d) num invalid\n",
|
|
|
+ __func__, iq_no);
|
|
|
+ }
|
|
|
+
|
|
|
+ if ((work_done < budget) && (tx_done)) {
|
|
|
+ napi_complete(napi);
|
|
|
+ octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no,
|
|
|
+ POLL_EVENT_ENABLE_INTR, 0);
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ return (!tx_done) ? (budget) : (work_done);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Setup input and output queues
|
|
|
+ * @param octeon_dev octeon device
|
|
|
+ * @param ifidx Interface index
|
|
|
+ *
|
|
|
+ * Note: Queues are with respect to the octeon device. Thus
|
|
|
+ * an input queue is for egress packets, and output queues
|
|
|
+ * are for ingress packets.
|
|
|
+ */
|
|
|
+static int setup_io_queues(struct octeon_device *octeon_dev, int ifidx)
|
|
|
+{
|
|
|
+ struct octeon_droq_ops droq_ops;
|
|
|
+ struct net_device *netdev;
|
|
|
+ static int cpu_id_modulus;
|
|
|
+ struct octeon_droq *droq;
|
|
|
+ struct napi_struct *napi;
|
|
|
+ static int cpu_id;
|
|
|
+ int num_tx_descs;
|
|
|
+ struct lio *lio;
|
|
|
+ int retval = 0;
|
|
|
+ int q, q_no;
|
|
|
+
|
|
|
+ netdev = octeon_dev->props[ifidx].netdev;
|
|
|
+
|
|
|
+ lio = GET_LIO(netdev);
|
|
|
+
|
|
|
+ memset(&droq_ops, 0, sizeof(struct octeon_droq_ops));
|
|
|
+
|
|
|
+ droq_ops.fptr = liquidio_push_packet;
|
|
|
+ droq_ops.farg = netdev;
|
|
|
+
|
|
|
+ droq_ops.poll_mode = 1;
|
|
|
+ droq_ops.napi_fn = liquidio_vf_napi_drv_callback;
|
|
|
+ cpu_id = 0;
|
|
|
+ cpu_id_modulus = num_present_cpus();
|
|
|
+
|
|
|
+ /* set up DROQs. */
|
|
|
+ for (q = 0; q < lio->linfo.num_rxpciq; q++) {
|
|
|
+ q_no = lio->linfo.rxpciq[q].s.q_no;
|
|
|
+
|
|
|
+ retval = octeon_setup_droq(
|
|
|
+ octeon_dev, q_no,
|
|
|
+ CFG_GET_NUM_RX_DESCS_NIC_IF(octeon_get_conf(octeon_dev),
|
|
|
+ lio->ifidx),
|
|
|
+ CFG_GET_NUM_RX_BUF_SIZE_NIC_IF(octeon_get_conf(octeon_dev),
|
|
|
+ lio->ifidx),
|
|
|
+ NULL);
|
|
|
+ if (retval) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev,
|
|
|
+ "%s : Runtime DROQ(RxQ) creation failed.\n",
|
|
|
+ __func__);
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+
|
|
|
+ droq = octeon_dev->droq[q_no];
|
|
|
+ napi = &droq->napi;
|
|
|
+ netif_napi_add(netdev, napi, liquidio_napi_poll, 64);
|
|
|
+
|
|
|
+ /* designate a CPU for this droq */
|
|
|
+ droq->cpu_id = cpu_id;
|
|
|
+ cpu_id++;
|
|
|
+ if (cpu_id >= cpu_id_modulus)
|
|
|
+ cpu_id = 0;
|
|
|
+
|
|
|
+ octeon_register_droq_ops(octeon_dev, q_no, &droq_ops);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* 23XX VF can send/recv control messages (via the first VF-owned
|
|
|
+ * droq) from the firmware even if the ethX interface is down,
|
|
|
+ * so that's why poll_mode must be off for the first droq.
|
|
|
+ */
|
|
|
+ octeon_dev->droq[0]->ops.poll_mode = 0;
|
|
|
+
|
|
|
+ /* set up IQs. */
|
|
|
+ for (q = 0; q < lio->linfo.num_txpciq; q++) {
|
|
|
+ num_tx_descs = CFG_GET_NUM_TX_DESCS_NIC_IF(
|
|
|
+ octeon_get_conf(octeon_dev), lio->ifidx);
|
|
|
+ retval = octeon_setup_iq(octeon_dev, ifidx, q,
|
|
|
+ lio->linfo.txpciq[q], num_tx_descs,
|
|
|
+ netdev_get_tx_queue(netdev, q));
|
|
|
+ if (retval) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev,
|
|
|
+ " %s : Runtime IQ(TxQ) creation failed.\n",
|
|
|
+ __func__);
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Net device open for LiquidIO
|
|
|
+ * @param netdev network device
|
|
|
+ */
|
|
|
+static int liquidio_open(struct net_device *netdev)
|
|
|
+{
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+ struct napi_struct *napi, *n;
|
|
|
+
|
|
|
+ if (!oct->props[lio->ifidx].napi_enabled) {
|
|
|
+ list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
|
|
|
+ napi_enable(napi);
|
|
|
+
|
|
|
+ oct->props[lio->ifidx].napi_enabled = 1;
|
|
|
+
|
|
|
+ oct->droq[0]->ops.poll_mode = 1;
|
|
|
+ }
|
|
|
+
|
|
|
+ ifstate_set(lio, LIO_IFSTATE_RUNNING);
|
|
|
+
|
|
|
+ /* Ready for link status updates */
|
|
|
+ lio->intf_open = 1;
|
|
|
+
|
|
|
+ netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n");
|
|
|
+ start_txq(netdev);
|
|
|
+
|
|
|
+ /* tell Octeon to start forwarding packets to host */
|
|
|
+ send_rx_ctrl_cmd(lio, 1);
|
|
|
+
|
|
|
+ dev_info(&oct->pci_dev->dev, "%s interface is opened\n", netdev->name);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Net device stop for LiquidIO
|
|
|
+ * @param netdev network device
|
|
|
+ */
|
|
|
+static int liquidio_stop(struct net_device *netdev)
|
|
|
+{
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+
|
|
|
+ netif_info(lio, ifdown, lio->netdev, "Stopping interface!\n");
|
|
|
+ /* Inform that netif carrier is down */
|
|
|
+ lio->intf_open = 0;
|
|
|
+ lio->linfo.link.s.link_up = 0;
|
|
|
+
|
|
|
+ netif_carrier_off(netdev);
|
|
|
+ lio->link_changes++;
|
|
|
+
|
|
|
+ /* tell Octeon to stop forwarding packets to host */
|
|
|
+ send_rx_ctrl_cmd(lio, 0);
|
|
|
+
|
|
|
+ ifstate_reset(lio, LIO_IFSTATE_RUNNING);
|
|
|
+
|
|
|
+ txqs_stop(netdev);
|
|
|
+
|
|
|
+ dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Converts a mask based on net device flags
|
|
|
+ * @param netdev network device
|
|
|
+ *
|
|
|
+ * This routine generates a octnet_ifflags mask from the net device flags
|
|
|
+ * received from the OS.
|
|
|
+ */
|
|
|
+static enum octnet_ifflags get_new_flags(struct net_device *netdev)
|
|
|
+{
|
|
|
+ enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST;
|
|
|
+
|
|
|
+ if (netdev->flags & IFF_PROMISC)
|
|
|
+ f |= OCTNET_IFFLAG_PROMISC;
|
|
|
+
|
|
|
+ if (netdev->flags & IFF_ALLMULTI)
|
|
|
+ f |= OCTNET_IFFLAG_ALLMULTI;
|
|
|
+
|
|
|
+ if (netdev->flags & IFF_MULTICAST) {
|
|
|
+ f |= OCTNET_IFFLAG_MULTICAST;
|
|
|
+
|
|
|
+ /* Accept all multicast addresses if there are more than we
|
|
|
+ * can handle
|
|
|
+ */
|
|
|
+ if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR)
|
|
|
+ f |= OCTNET_IFFLAG_ALLMULTI;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (netdev->flags & IFF_BROADCAST)
|
|
|
+ f |= OCTNET_IFFLAG_BROADCAST;
|
|
|
+
|
|
|
+ return f;
|
|
|
+}
|
|
|
+
|
|
|
+static void liquidio_set_uc_list(struct net_device *netdev)
|
|
|
+{
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+ struct octnic_ctrl_pkt nctrl;
|
|
|
+ struct netdev_hw_addr *ha;
|
|
|
+ u64 *mac;
|
|
|
+
|
|
|
+ if (lio->netdev_uc_count == netdev_uc_count(netdev))
|
|
|
+ return;
|
|
|
+
|
|
|
+ if (netdev_uc_count(netdev) > MAX_NCTRL_UDD) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "too many MAC addresses in netdev uc list\n");
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ lio->netdev_uc_count = netdev_uc_count(netdev);
|
|
|
+
|
|
|
+ memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
|
|
|
+ nctrl.ncmd.s.cmd = OCTNET_CMD_SET_UC_LIST;
|
|
|
+ nctrl.ncmd.s.more = lio->netdev_uc_count;
|
|
|
+ nctrl.ncmd.s.param1 = oct->vf_num;
|
|
|
+ nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
|
|
|
+ nctrl.netpndev = (u64)netdev;
|
|
|
+ nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
|
|
|
+
|
|
|
+ /* copy all the addresses into the udd */
|
|
|
+ mac = &nctrl.udd[0];
|
|
|
+ netdev_for_each_uc_addr(ha, netdev) {
|
|
|
+ ether_addr_copy(((u8 *)mac) + 2, ha->addr);
|
|
|
+ mac++;
|
|
|
+ }
|
|
|
+
|
|
|
+ octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Net device set_multicast_list
|
|
|
+ * @param netdev network device
|
|
|
+ */
|
|
|
+static void liquidio_set_mcast_list(struct net_device *netdev)
|
|
|
+{
|
|
|
+ int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR);
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+ struct octnic_ctrl_pkt nctrl;
|
|
|
+ struct netdev_hw_addr *ha;
|
|
|
+ u64 *mc;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
|
|
|
+
|
|
|
+ /* Create a ctrl pkt command to be sent to core app. */
|
|
|
+ nctrl.ncmd.u64 = 0;
|
|
|
+ nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST;
|
|
|
+ nctrl.ncmd.s.param1 = get_new_flags(netdev);
|
|
|
+ nctrl.ncmd.s.param2 = mc_count;
|
|
|
+ nctrl.ncmd.s.more = mc_count;
|
|
|
+ nctrl.netpndev = (u64)netdev;
|
|
|
+ nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
|
|
|
+
|
|
|
+ /* copy all the addresses into the udd */
|
|
|
+ mc = &nctrl.udd[0];
|
|
|
+ netdev_for_each_mc_addr(ha, netdev) {
|
|
|
+ *mc = 0;
|
|
|
+ ether_addr_copy(((u8 *)mc) + 2, ha->addr);
|
|
|
+ /* no need to swap bytes */
|
|
|
+ if (++mc > &nctrl.udd[mc_count])
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
|
|
|
+
|
|
|
+ /* Apparently, any activity in this call from the kernel has to
|
|
|
+ * be atomic. So we won't wait for response.
|
|
|
+ */
|
|
|
+ nctrl.wait_time = 0;
|
|
|
+
|
|
|
+ ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
|
|
|
+ if (ret < 0) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n",
|
|
|
+ ret);
|
|
|
+ }
|
|
|
+
|
|
|
+ liquidio_set_uc_list(netdev);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Net device set_mac_address
|
|
|
+ * @param netdev network device
|
|
|
+ */
|
|
|
+static int liquidio_set_mac(struct net_device *netdev, void *p)
|
|
|
+{
|
|
|
+ struct sockaddr *addr = (struct sockaddr *)p;
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+ struct octnic_ctrl_pkt nctrl;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ if (!is_valid_ether_addr(addr->sa_data))
|
|
|
+ return -EADDRNOTAVAIL;
|
|
|
+
|
|
|
+ if (ether_addr_equal(addr->sa_data, netdev->dev_addr))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ if (lio->linfo.macaddr_is_admin_asgnd)
|
|
|
+ return -EPERM;
|
|
|
+
|
|
|
+ memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
|
|
|
+
|
|
|
+ nctrl.ncmd.u64 = 0;
|
|
|
+ nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
|
|
|
+ nctrl.ncmd.s.param1 = 0;
|
|
|
+ nctrl.ncmd.s.more = 1;
|
|
|
+ nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
|
|
|
+ nctrl.netpndev = (u64)netdev;
|
|
|
+ nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
|
|
|
+ nctrl.wait_time = 100;
|
|
|
+
|
|
|
+ nctrl.udd[0] = 0;
|
|
|
+ /* The MAC Address is presented in network byte order. */
|
|
|
+ ether_addr_copy((u8 *)&nctrl.udd[0] + 2, addr->sa_data);
|
|
|
+
|
|
|
+ ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
|
|
|
+ if (ret < 0) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "MAC Address change failed\n");
|
|
|
+ return -ENOMEM;
|
|
|
+ }
|
|
|
+ memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
|
|
|
+ ether_addr_copy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Net device change_mtu
|
|
|
+ * @param netdev network device
|
|
|
+ */
|
|
|
+static int liquidio_change_mtu(struct net_device *netdev, int new_mtu)
|
|
|
+{
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+
|
|
|
+ lio->mtu = new_mtu;
|
|
|
+
|
|
|
+ netif_info(lio, probe, lio->netdev, "MTU Changed from %d to %d\n",
|
|
|
+ netdev->mtu, new_mtu);
|
|
|
+ dev_info(&oct->pci_dev->dev, "%s MTU Changed from %d to %d\n",
|
|
|
+ netdev->name, netdev->mtu, new_mtu);
|
|
|
+
|
|
|
+ netdev->mtu = new_mtu;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/** \brief Transmit networks packets to the Octeon interface
|
|
|
+ * @param skbuff skbuff struct to be passed to network layer.
|
|
|
+ * @param netdev pointer to network device
|
|
|
+ * @returns whether the packet was transmitted to the device okay or not
|
|
|
+ * (NETDEV_TX_OK or NETDEV_TX_BUSY)
|
|
|
+ */
|
|
|
+static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
|
|
|
+{
|
|
|
+ struct octnet_buf_free_info *finfo;
|
|
|
+ union octnic_cmd_setup cmdsetup;
|
|
|
+ struct octnic_data_pkt ndata;
|
|
|
+ struct octeon_instr_irh *irh;
|
|
|
+ struct oct_iq_stats *stats;
|
|
|
+ struct octeon_device *oct;
|
|
|
+ int q_idx = 0, iq_no = 0;
|
|
|
+ union tx_info *tx_info;
|
|
|
+ struct lio *lio;
|
|
|
+ int status = 0;
|
|
|
+ u64 dptr = 0;
|
|
|
+ u32 tag = 0;
|
|
|
+ int j;
|
|
|
+
|
|
|
+ lio = GET_LIO(netdev);
|
|
|
+ oct = lio->oct_dev;
|
|
|
+
|
|
|
+ if (netif_is_multiqueue(netdev)) {
|
|
|
+ q_idx = skb->queue_mapping;
|
|
|
+ q_idx = (q_idx % (lio->linfo.num_txpciq));
|
|
|
+ tag = q_idx;
|
|
|
+ iq_no = lio->linfo.txpciq[q_idx].s.q_no;
|
|
|
+ } else {
|
|
|
+ iq_no = lio->txq;
|
|
|
+ }
|
|
|
+
|
|
|
+ stats = &oct->instr_queue[iq_no]->stats;
|
|
|
+
|
|
|
+ /* Check for all conditions in which the current packet cannot be
|
|
|
+ * transmitted.
|
|
|
+ */
|
|
|
+ if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) ||
|
|
|
+ (!lio->linfo.link.s.link_up) || (skb->len <= 0)) {
|
|
|
+ netif_info(lio, tx_err, lio->netdev, "Transmit failed link_status : %d\n",
|
|
|
+ lio->linfo.link.s.link_up);
|
|
|
+ goto lio_xmit_failed;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Use space in skb->cb to store info used to unmap and
|
|
|
+ * free the buffers.
|
|
|
+ */
|
|
|
+ finfo = (struct octnet_buf_free_info *)skb->cb;
|
|
|
+ finfo->lio = lio;
|
|
|
+ finfo->skb = skb;
|
|
|
+ finfo->sc = NULL;
|
|
|
+
|
|
|
+ /* Prepare the attributes for the data to be passed to OSI. */
|
|
|
+ memset(&ndata, 0, sizeof(struct octnic_data_pkt));
|
|
|
+
|
|
|
+ ndata.buf = finfo;
|
|
|
+
|
|
|
+ ndata.q_no = iq_no;
|
|
|
+
|
|
|
+ if (netif_is_multiqueue(netdev)) {
|
|
|
+ if (octnet_iq_is_full(oct, ndata.q_no)) {
|
|
|
+ /* defer sending if queue is full */
|
|
|
+ netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
|
|
|
+ ndata.q_no);
|
|
|
+ stats->tx_iq_busy++;
|
|
|
+ return NETDEV_TX_BUSY;
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ if (octnet_iq_is_full(oct, lio->txq)) {
|
|
|
+ /* defer sending if queue is full */
|
|
|
+ stats->tx_iq_busy++;
|
|
|
+ netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
|
|
|
+ ndata.q_no);
|
|
|
+ return NETDEV_TX_BUSY;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ ndata.datasize = skb->len;
|
|
|
+
|
|
|
+ cmdsetup.u64 = 0;
|
|
|
+ cmdsetup.s.iq_no = iq_no;
|
|
|
+
|
|
|
+ if (skb->ip_summed == CHECKSUM_PARTIAL)
|
|
|
+ cmdsetup.s.transport_csum = 1;
|
|
|
+
|
|
|
+ if (!skb_shinfo(skb)->nr_frags) {
|
|
|
+ cmdsetup.s.u.datasize = skb->len;
|
|
|
+ octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
|
|
|
+ /* Offload checksum calculation for TCP/UDP packets */
|
|
|
+ dptr = dma_map_single(&oct->pci_dev->dev,
|
|
|
+ skb->data,
|
|
|
+ skb->len,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ if (dma_mapping_error(&oct->pci_dev->dev, dptr)) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n",
|
|
|
+ __func__);
|
|
|
+ return NETDEV_TX_BUSY;
|
|
|
+ }
|
|
|
+
|
|
|
+ ndata.cmd.cmd3.dptr = dptr;
|
|
|
+ finfo->dptr = dptr;
|
|
|
+ ndata.reqtype = REQTYPE_NORESP_NET;
|
|
|
+
|
|
|
+ } else {
|
|
|
+ struct skb_frag_struct *frag;
|
|
|
+ struct octnic_gather *g;
|
|
|
+ int i, frags;
|
|
|
+
|
|
|
+ spin_lock(&lio->glist_lock[q_idx]);
|
|
|
+ g = (struct octnic_gather *)list_delete_head(
|
|
|
+ &lio->glist[q_idx]);
|
|
|
+ spin_unlock(&lio->glist_lock[q_idx]);
|
|
|
+
|
|
|
+ if (!g) {
|
|
|
+ netif_info(lio, tx_err, lio->netdev,
|
|
|
+ "Transmit scatter gather: glist null!\n");
|
|
|
+ goto lio_xmit_failed;
|
|
|
+ }
|
|
|
+
|
|
|
+ cmdsetup.s.gather = 1;
|
|
|
+ cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1);
|
|
|
+ octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
|
|
|
+
|
|
|
+ memset(g->sg, 0, g->sg_size);
|
|
|
+
|
|
|
+ g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev,
|
|
|
+ skb->data,
|
|
|
+ (skb->len - skb->data_len),
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n",
|
|
|
+ __func__);
|
|
|
+ return NETDEV_TX_BUSY;
|
|
|
+ }
|
|
|
+ add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0);
|
|
|
+
|
|
|
+ frags = skb_shinfo(skb)->nr_frags;
|
|
|
+ i = 1;
|
|
|
+ while (frags--) {
|
|
|
+ frag = &skb_shinfo(skb)->frags[i - 1];
|
|
|
+
|
|
|
+ g->sg[(i >> 2)].ptr[(i & 3)] =
|
|
|
+ dma_map_page(&oct->pci_dev->dev,
|
|
|
+ frag->page.p,
|
|
|
+ frag->page_offset,
|
|
|
+ frag->size,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ if (dma_mapping_error(&oct->pci_dev->dev,
|
|
|
+ g->sg[i >> 2].ptr[i & 3])) {
|
|
|
+ dma_unmap_single(&oct->pci_dev->dev,
|
|
|
+ g->sg[0].ptr[0],
|
|
|
+ skb->len - skb->data_len,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ for (j = 1; j < i; j++) {
|
|
|
+ frag = &skb_shinfo(skb)->frags[j - 1];
|
|
|
+ dma_unmap_page(&oct->pci_dev->dev,
|
|
|
+ g->sg[j >> 2].ptr[j & 3],
|
|
|
+ frag->size,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ }
|
|
|
+ dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n",
|
|
|
+ __func__);
|
|
|
+ return NETDEV_TX_BUSY;
|
|
|
+ }
|
|
|
+
|
|
|
+ add_sg_size(&g->sg[(i >> 2)], frag->size, (i & 3));
|
|
|
+ i++;
|
|
|
+ }
|
|
|
+
|
|
|
+ dptr = dma_map_single(&oct->pci_dev->dev,
|
|
|
+ g->sg, g->sg_size,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ if (dma_mapping_error(&oct->pci_dev->dev, dptr)) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "%s DMA mapping error 4\n",
|
|
|
+ __func__);
|
|
|
+ dma_unmap_single(&oct->pci_dev->dev, g->sg[0].ptr[0],
|
|
|
+ skb->len - skb->data_len,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+ for (j = 1; j <= frags; j++) {
|
|
|
+ frag = &skb_shinfo(skb)->frags[j - 1];
|
|
|
+ dma_unmap_page(&oct->pci_dev->dev,
|
|
|
+ g->sg[j >> 2].ptr[j & 3],
|
|
|
+ frag->size, DMA_TO_DEVICE);
|
|
|
+ }
|
|
|
+ return NETDEV_TX_BUSY;
|
|
|
+ }
|
|
|
+
|
|
|
+ ndata.cmd.cmd3.dptr = dptr;
|
|
|
+ finfo->dptr = dptr;
|
|
|
+ finfo->g = g;
|
|
|
+
|
|
|
+ ndata.reqtype = REQTYPE_NORESP_NET_SG;
|
|
|
+ }
|
|
|
+
|
|
|
+ irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh;
|
|
|
+ tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0];
|
|
|
+
|
|
|
+ if (skb_shinfo(skb)->gso_size) {
|
|
|
+ tx_info->s.gso_size = skb_shinfo(skb)->gso_size;
|
|
|
+ tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs;
|
|
|
+ }
|
|
|
+
|
|
|
+ status = octnet_send_nic_data_pkt(oct, &ndata);
|
|
|
+ if (status == IQ_SEND_FAILED)
|
|
|
+ goto lio_xmit_failed;
|
|
|
+
|
|
|
+ netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n");
|
|
|
+
|
|
|
+ if (status == IQ_SEND_STOP) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "Rcvd IQ_SEND_STOP signal; stopping IQ-%d\n",
|
|
|
+ iq_no);
|
|
|
+ stop_q(lio->netdev, q_idx);
|
|
|
+ }
|
|
|
+
|
|
|
+ netif_trans_update(netdev);
|
|
|
+
|
|
|
+ if (skb_shinfo(skb)->gso_size)
|
|
|
+ stats->tx_done += skb_shinfo(skb)->gso_segs;
|
|
|
+ else
|
|
|
+ stats->tx_done++;
|
|
|
+ stats->tx_tot_bytes += skb->len;
|
|
|
+
|
|
|
+ return NETDEV_TX_OK;
|
|
|
+
|
|
|
+lio_xmit_failed:
|
|
|
+ stats->tx_dropped++;
|
|
|
+ netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n",
|
|
|
+ iq_no, stats->tx_dropped);
|
|
|
+ if (dptr)
|
|
|
+ dma_unmap_single(&oct->pci_dev->dev, dptr,
|
|
|
+ ndata.datasize, DMA_TO_DEVICE);
|
|
|
+ tx_buffer_free(skb);
|
|
|
+ return NETDEV_TX_OK;
|
|
|
+}
|
|
|
+
|
|
|
+/** \brief Network device Tx timeout
|
|
|
+ * @param netdev pointer to network device
|
|
|
+ */
|
|
|
+static void liquidio_tx_timeout(struct net_device *netdev)
|
|
|
+{
|
|
|
+ struct lio *lio;
|
|
|
+
|
|
|
+ lio = GET_LIO(netdev);
|
|
|
+
|
|
|
+ netif_info(lio, tx_err, lio->netdev,
|
|
|
+ "Transmit timeout tx_dropped:%ld, waking up queues now!!\n",
|
|
|
+ netdev->stats.tx_dropped);
|
|
|
+ netif_trans_update(netdev);
|
|
|
+ txqs_wake(netdev);
|
|
|
+}
|
|
|
+
|
|
|
+/** Sending command to enable/disable RX checksum offload
|
|
|
+ * @param netdev pointer to network device
|
|
|
+ * @param command OCTNET_CMD_TNL_RX_CSUM_CTL
|
|
|
+ * @param rx_cmd_bit OCTNET_CMD_RXCSUM_ENABLE/
|
|
|
+ * OCTNET_CMD_RXCSUM_DISABLE
|
|
|
+ * @returns SUCCESS or FAILURE
|
|
|
+ */
|
|
|
+static int liquidio_set_rxcsum_command(struct net_device *netdev, int command,
|
|
|
+ u8 rx_cmd)
|
|
|
+{
|
|
|
+ struct lio *lio = GET_LIO(netdev);
|
|
|
+ struct octeon_device *oct = lio->oct_dev;
|
|
|
+ struct octnic_ctrl_pkt nctrl;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ nctrl.ncmd.u64 = 0;
|
|
|
+ nctrl.ncmd.s.cmd = command;
|
|
|
+ nctrl.ncmd.s.param1 = rx_cmd;
|
|
|
+ nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
|
|
|
+ nctrl.wait_time = 100;
|
|
|
+ nctrl.netpndev = (u64)netdev;
|
|
|
+ nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
|
|
|
+
|
|
|
+ ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
|
|
|
+ if (ret < 0) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "DEVFLAGS RXCSUM change failed in core (ret:0x%x)\n",
|
|
|
+ ret);
|
|
|
+ }
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/** \brief Net device fix features
|
|
|
+ * @param netdev pointer to network device
|
|
|
+ * @param request features requested
|
|
|
+ * @returns updated features list
|
|
|
+ */
|
|
|
+static netdev_features_t liquidio_fix_features(struct net_device *netdev,
|
|
|
+ netdev_features_t request)
|
|
|
+{
|
|
|
+ struct lio *lio = netdev_priv(netdev);
|
|
|
+
|
|
|
+ if ((request & NETIF_F_RXCSUM) &&
|
|
|
+ !(lio->dev_capability & NETIF_F_RXCSUM))
|
|
|
+ request &= ~NETIF_F_RXCSUM;
|
|
|
+
|
|
|
+ if ((request & NETIF_F_HW_CSUM) &&
|
|
|
+ !(lio->dev_capability & NETIF_F_HW_CSUM))
|
|
|
+ request &= ~NETIF_F_HW_CSUM;
|
|
|
+
|
|
|
+ if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO))
|
|
|
+ request &= ~NETIF_F_TSO;
|
|
|
+
|
|
|
+ if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6))
|
|
|
+ request &= ~NETIF_F_TSO6;
|
|
|
+
|
|
|
+ if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO))
|
|
|
+ request &= ~NETIF_F_LRO;
|
|
|
+
|
|
|
+ /* Disable LRO if RXCSUM is off */
|
|
|
+ if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) &&
|
|
|
+ (lio->dev_capability & NETIF_F_LRO))
|
|
|
+ request &= ~NETIF_F_LRO;
|
|
|
+
|
|
|
+ return request;
|
|
|
+}
|
|
|
+
|
|
|
+/** \brief Net device set features
|
|
|
+ * @param netdev pointer to network device
|
|
|
+ * @param features features to enable/disable
|
|
|
+ */
|
|
|
+static int liquidio_set_features(struct net_device *netdev,
|
|
|
+ netdev_features_t features)
|
|
|
+{
|
|
|
+ struct lio *lio = netdev_priv(netdev);
|
|
|
+
|
|
|
+ if (!((netdev->features ^ features) & NETIF_F_LRO))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ if ((features & NETIF_F_LRO) && (lio->dev_capability & NETIF_F_LRO))
|
|
|
+ liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
|
|
|
+ OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
|
|
|
+ else if (!(features & NETIF_F_LRO) &&
|
|
|
+ (lio->dev_capability & NETIF_F_LRO))
|
|
|
+ liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE,
|
|
|
+ OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
|
|
|
+ if (!(netdev->features & NETIF_F_RXCSUM) &&
|
|
|
+ (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
|
|
|
+ (features & NETIF_F_RXCSUM))
|
|
|
+ liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
|
|
|
+ OCTNET_CMD_RXCSUM_ENABLE);
|
|
|
+ else if ((netdev->features & NETIF_F_RXCSUM) &&
|
|
|
+ (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
|
|
|
+ !(features & NETIF_F_RXCSUM))
|
|
|
+ liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
|
|
|
+ OCTNET_CMD_RXCSUM_DISABLE);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct net_device_ops lionetdevops = {
|
|
|
+ .ndo_open = liquidio_open,
|
|
|
+ .ndo_stop = liquidio_stop,
|
|
|
+ .ndo_start_xmit = liquidio_xmit,
|
|
|
+ .ndo_set_mac_address = liquidio_set_mac,
|
|
|
+ .ndo_set_rx_mode = liquidio_set_mcast_list,
|
|
|
+ .ndo_tx_timeout = liquidio_tx_timeout,
|
|
|
+ .ndo_change_mtu = liquidio_change_mtu,
|
|
|
+ .ndo_fix_features = liquidio_fix_features,
|
|
|
+ .ndo_set_features = liquidio_set_features,
|
|
|
+ .ndo_select_queue = select_q,
|
|
|
+};
|
|
|
+
|
|
|
+static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf)
|
|
|
+{
|
|
|
+ struct octeon_device *oct = (struct octeon_device *)buf;
|
|
|
+ struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
|
|
|
+ union oct_link_status *ls;
|
|
|
+ int gmxport = 0;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ if (recv_pkt->buffer_size[0] != sizeof(*ls)) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n",
|
|
|
+ recv_pkt->buffer_size[0],
|
|
|
+ recv_pkt->rh.r_nic_info.gmxport);
|
|
|
+ goto nic_info_err;
|
|
|
+ }
|
|
|
+
|
|
|
+ gmxport = recv_pkt->rh.r_nic_info.gmxport;
|
|
|
+ ls = (union oct_link_status *)get_rbd(recv_pkt->buffer_ptr[0]);
|
|
|
+
|
|
|
+ octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3);
|
|
|
+
|
|
|
+ for (i = 0; i < oct->ifcount; i++) {
|
|
|
+ if (oct->props[i].gmxport == gmxport) {
|
|
|
+ update_link_status(oct->props[i].netdev, ls);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+nic_info_err:
|
|
|
+ for (i = 0; i < recv_pkt->buffer_count; i++)
|
|
|
+ recv_buffer_free(recv_pkt->buffer_ptr[i]);
|
|
|
+ octeon_free_recv_info(recv_info);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Setup network interfaces
|
|
|
+ * @param octeon_dev octeon device
|
|
|
+ *
|
|
|
+ * Called during init time for each device. It assumes the NIC
|
|
|
+ * is already up and running. The link information for each
|
|
|
+ * interface is passed in link_info.
|
|
|
+ */
|
|
|
+static int setup_nic_devices(struct octeon_device *octeon_dev)
|
|
|
+{
|
|
|
+ int retval, num_iqueues, num_oqueues;
|
|
|
+ struct liquidio_if_cfg_context *ctx;
|
|
|
+ u32 resp_size, ctx_size, data_size;
|
|
|
+ struct liquidio_if_cfg_resp *resp;
|
|
|
+ struct octeon_soft_command *sc;
|
|
|
+ union oct_nic_if_cfg if_cfg;
|
|
|
+ struct octdev_props *props;
|
|
|
+ struct net_device *netdev;
|
|
|
+ struct lio_version *vdata;
|
|
|
+ struct lio *lio = NULL;
|
|
|
+ u8 mac[ETH_ALEN], i, j;
|
|
|
+ u32 ifidx_or_pfnum;
|
|
|
+
|
|
|
+ ifidx_or_pfnum = octeon_dev->pf_num;
|
|
|
+
|
|
|
+ /* This is to handle link status changes */
|
|
|
+ octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, OPCODE_NIC_INFO,
|
|
|
+ lio_nic_info, octeon_dev);
|
|
|
+
|
|
|
+ /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions.
|
|
|
+ * They are handled directly.
|
|
|
+ */
|
|
|
+ octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET,
|
|
|
+ free_netbuf);
|
|
|
+
|
|
|
+ octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG,
|
|
|
+ free_netsgbuf);
|
|
|
+
|
|
|
+ octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG,
|
|
|
+ free_netsgbuf_with_resp);
|
|
|
+
|
|
|
+ for (i = 0; i < octeon_dev->ifcount; i++) {
|
|
|
+ resp_size = sizeof(struct liquidio_if_cfg_resp);
|
|
|
+ ctx_size = sizeof(struct liquidio_if_cfg_context);
|
|
|
+ data_size = sizeof(struct lio_version);
|
|
|
+ sc = (struct octeon_soft_command *)
|
|
|
+ octeon_alloc_soft_command(octeon_dev, data_size,
|
|
|
+ resp_size, ctx_size);
|
|
|
+ resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
|
|
|
+ ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
|
|
|
+ vdata = (struct lio_version *)sc->virtdptr;
|
|
|
+
|
|
|
+ *((u64 *)vdata) = 0;
|
|
|
+ vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION);
|
|
|
+ vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION);
|
|
|
+ vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION);
|
|
|
+
|
|
|
+ WRITE_ONCE(ctx->cond, 0);
|
|
|
+ ctx->octeon_id = lio_get_device_id(octeon_dev);
|
|
|
+ init_waitqueue_head(&ctx->wc);
|
|
|
+
|
|
|
+ if_cfg.u64 = 0;
|
|
|
+
|
|
|
+ if_cfg.s.num_iqueues = octeon_dev->sriov_info.rings_per_vf;
|
|
|
+ if_cfg.s.num_oqueues = octeon_dev->sriov_info.rings_per_vf;
|
|
|
+ if_cfg.s.base_queue = 0;
|
|
|
+
|
|
|
+ sc->iq_no = 0;
|
|
|
+
|
|
|
+ octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC,
|
|
|
+ OPCODE_NIC_IF_CFG, 0, if_cfg.u64,
|
|
|
+ 0);
|
|
|
+
|
|
|
+ sc->callback = if_cfg_callback;
|
|
|
+ sc->callback_arg = sc;
|
|
|
+ sc->wait_time = 5000;
|
|
|
+
|
|
|
+ retval = octeon_send_soft_command(octeon_dev, sc);
|
|
|
+ if (retval == IQ_SEND_FAILED) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev,
|
|
|
+ "iq/oq config failed status: %x\n", retval);
|
|
|
+ /* Soft instr is freed by driver in case of failure. */
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Sleep on a wait queue till the cond flag indicates that the
|
|
|
+ * response arrived or timed-out.
|
|
|
+ */
|
|
|
+ if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev, "Wait interrupted\n");
|
|
|
+ goto setup_nic_wait_intr;
|
|
|
+ }
|
|
|
+
|
|
|
+ retval = resp->status;
|
|
|
+ if (retval) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n");
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+
|
|
|
+ octeon_swap_8B_data((u64 *)(&resp->cfg_info),
|
|
|
+ (sizeof(struct liquidio_if_cfg_info)) >> 3);
|
|
|
+
|
|
|
+ num_iqueues = hweight64(resp->cfg_info.iqmask);
|
|
|
+ num_oqueues = hweight64(resp->cfg_info.oqmask);
|
|
|
+
|
|
|
+ if (!(num_iqueues) || !(num_oqueues)) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev,
|
|
|
+ "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n",
|
|
|
+ resp->cfg_info.iqmask, resp->cfg_info.oqmask);
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+ dev_dbg(&octeon_dev->pci_dev->dev,
|
|
|
+ "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n",
|
|
|
+ i, resp->cfg_info.iqmask, resp->cfg_info.oqmask,
|
|
|
+ num_iqueues, num_oqueues);
|
|
|
+
|
|
|
+ netdev = alloc_etherdev_mq(LIO_SIZE, num_iqueues);
|
|
|
+
|
|
|
+ if (!netdev) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n");
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+
|
|
|
+ SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev);
|
|
|
+
|
|
|
+ /* Associate the routines that will handle different
|
|
|
+ * netdev tasks.
|
|
|
+ */
|
|
|
+ netdev->netdev_ops = &lionetdevops;
|
|
|
+
|
|
|
+ lio = GET_LIO(netdev);
|
|
|
+
|
|
|
+ memset(lio, 0, sizeof(struct lio));
|
|
|
+
|
|
|
+ lio->ifidx = ifidx_or_pfnum;
|
|
|
+
|
|
|
+ props = &octeon_dev->props[i];
|
|
|
+ props->gmxport = resp->cfg_info.linfo.gmxport;
|
|
|
+ props->netdev = netdev;
|
|
|
+
|
|
|
+ lio->linfo.num_rxpciq = num_oqueues;
|
|
|
+ lio->linfo.num_txpciq = num_iqueues;
|
|
|
+
|
|
|
+ for (j = 0; j < num_oqueues; j++) {
|
|
|
+ lio->linfo.rxpciq[j].u64 =
|
|
|
+ resp->cfg_info.linfo.rxpciq[j].u64;
|
|
|
+ }
|
|
|
+ for (j = 0; j < num_iqueues; j++) {
|
|
|
+ lio->linfo.txpciq[j].u64 =
|
|
|
+ resp->cfg_info.linfo.txpciq[j].u64;
|
|
|
+ }
|
|
|
+
|
|
|
+ lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr;
|
|
|
+ lio->linfo.gmxport = resp->cfg_info.linfo.gmxport;
|
|
|
+ lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64;
|
|
|
+ lio->linfo.macaddr_is_admin_asgnd =
|
|
|
+ resp->cfg_info.linfo.macaddr_is_admin_asgnd;
|
|
|
+
|
|
|
+ lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
|
|
|
+
|
|
|
+ lio->dev_capability = NETIF_F_HIGHDMA
|
|
|
+ | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
|
|
|
+ | NETIF_F_SG | NETIF_F_RXCSUM
|
|
|
+ | NETIF_F_TSO | NETIF_F_TSO6
|
|
|
+ | NETIF_F_GRO
|
|
|
+ | NETIF_F_LRO;
|
|
|
+ netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE);
|
|
|
+
|
|
|
+ netdev->features = (lio->dev_capability & ~NETIF_F_LRO);
|
|
|
+
|
|
|
+ netdev->hw_features = lio->dev_capability;
|
|
|
+
|
|
|
+ /* MTU range: 68 - 16000 */
|
|
|
+ netdev->min_mtu = LIO_MIN_MTU_SIZE;
|
|
|
+ netdev->max_mtu = LIO_MAX_MTU_SIZE;
|
|
|
+
|
|
|
+ /* Point to the properties for octeon device to which this
|
|
|
+ * interface belongs.
|
|
|
+ */
|
|
|
+ lio->oct_dev = octeon_dev;
|
|
|
+ lio->octprops = props;
|
|
|
+ lio->netdev = netdev;
|
|
|
+
|
|
|
+ dev_dbg(&octeon_dev->pci_dev->dev,
|
|
|
+ "if%d gmx: %d hw_addr: 0x%llx\n", i,
|
|
|
+ lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr));
|
|
|
+
|
|
|
+ /* 64-bit swap required on LE machines */
|
|
|
+ octeon_swap_8B_data(&lio->linfo.hw_addr, 1);
|
|
|
+ for (j = 0; j < ETH_ALEN; j++)
|
|
|
+ mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j));
|
|
|
+
|
|
|
+ /* Copy MAC Address to OS network device structure */
|
|
|
+ ether_addr_copy(netdev->dev_addr, mac);
|
|
|
+
|
|
|
+ if (setup_io_queues(octeon_dev, i)) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n");
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+
|
|
|
+ ifstate_set(lio, LIO_IFSTATE_DROQ_OPS);
|
|
|
+
|
|
|
+ /* For VFs, enable Octeon device interrupts here,
|
|
|
+ * as this is contingent upon IO queue setup
|
|
|
+ */
|
|
|
+ octeon_dev->fn_list.enable_interrupt(octeon_dev,
|
|
|
+ OCTEON_ALL_INTR);
|
|
|
+
|
|
|
+ /* By default all interfaces on a single Octeon uses the same
|
|
|
+ * tx and rx queues
|
|
|
+ */
|
|
|
+ lio->txq = lio->linfo.txpciq[0].s.q_no;
|
|
|
+ lio->rxq = lio->linfo.rxpciq[0].s.q_no;
|
|
|
+
|
|
|
+ lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq);
|
|
|
+ lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq);
|
|
|
+
|
|
|
+ if (setup_glists(lio, num_iqueues)) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev,
|
|
|
+ "Gather list allocation failed\n");
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (netdev->features & NETIF_F_LRO)
|
|
|
+ liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
|
|
|
+ OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
|
|
|
+
|
|
|
+ if ((debug != -1) && (debug & NETIF_MSG_HW))
|
|
|
+ liquidio_set_feature(netdev, OCTNET_CMD_VERBOSE_ENABLE,
|
|
|
+ 0);
|
|
|
+
|
|
|
+ if (setup_link_status_change_wq(netdev))
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+
|
|
|
+ /* Register the network device with the OS */
|
|
|
+ if (register_netdev(netdev)) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n");
|
|
|
+ goto setup_nic_dev_fail;
|
|
|
+ }
|
|
|
+
|
|
|
+ dev_dbg(&octeon_dev->pci_dev->dev,
|
|
|
+ "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n",
|
|
|
+ i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
|
|
+ netif_carrier_off(netdev);
|
|
|
+ lio->link_changes++;
|
|
|
+
|
|
|
+ ifstate_set(lio, LIO_IFSTATE_REGISTERED);
|
|
|
+
|
|
|
+ /* Sending command to firmware to enable Rx checksum offload
|
|
|
+ * by default at the time of setup of Liquidio driver for
|
|
|
+ * this device
|
|
|
+ */
|
|
|
+ liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
|
|
|
+ OCTNET_CMD_RXCSUM_ENABLE);
|
|
|
+ liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL,
|
|
|
+ OCTNET_CMD_TXCSUM_ENABLE);
|
|
|
+
|
|
|
+ dev_dbg(&octeon_dev->pci_dev->dev,
|
|
|
+ "NIC ifidx:%d Setup successful\n", i);
|
|
|
+
|
|
|
+ octeon_free_soft_command(octeon_dev, sc);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+setup_nic_dev_fail:
|
|
|
+
|
|
|
+ octeon_free_soft_command(octeon_dev, sc);
|
|
|
+
|
|
|
+setup_nic_wait_intr:
|
|
|
+
|
|
|
+ while (i--) {
|
|
|
+ dev_err(&octeon_dev->pci_dev->dev,
|
|
|
+ "NIC ifidx:%d Setup failed\n", i);
|
|
|
+ liquidio_destroy_nic_device(octeon_dev, i);
|
|
|
+ }
|
|
|
+ return -ENODEV;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief initialize the NIC
|
|
|
+ * @param oct octeon device
|
|
|
+ *
|
|
|
+ * This initialization routine is called once the Octeon device application is
|
|
|
+ * up and running
|
|
|
+ */
|
|
|
+static int liquidio_init_nic_module(struct octeon_device *oct)
|
|
|
+{
|
|
|
+ int num_nic_ports = 1;
|
|
|
+ int i, retval = 0;
|
|
|
+
|
|
|
+ dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n");
|
|
|
+
|
|
|
+ /* only default iq and oq were initialized
|
|
|
+ * initialize the rest as well run port_config command for each port
|
|
|
+ */
|
|
|
+ oct->ifcount = num_nic_ports;
|
|
|
+ memset(oct->props, 0,
|
|
|
+ sizeof(struct octdev_props) * num_nic_ports);
|
|
|
+
|
|
|
+ for (i = 0; i < MAX_OCTEON_LINKS; i++)
|
|
|
+ oct->props[i].gmxport = -1;
|
|
|
+
|
|
|
+ retval = setup_nic_devices(oct);
|
|
|
+ if (retval) {
|
|
|
+ dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n");
|
|
|
+ goto octnet_init_failure;
|
|
|
+ }
|
|
|
+
|
|
|
+octnet_init_failure:
|
|
|
+
|
|
|
+ oct->ifcount = 0;
|
|
|
+
|
|
|
+ return retval;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * \brief Device initialization for each Octeon device that is probed
|
|
|
+ * @param octeon_dev octeon device
|
|
|
+ */
|
|
|
+static int octeon_device_init(struct octeon_device *oct)
|
|
|
+{
|
|
|
+ u32 rev_id;
|
|
|
+ int j;
|
|
|
+
|
|
|
+ atomic_set(&oct->status, OCT_DEV_BEGIN_STATE);
|
|
|
+
|
|
|
+ /* Enable access to the octeon device and make its DMA capability
|
|
|
+ * known to the OS.
|
|
|
+ */
|
|
|
+ if (octeon_pci_os_setup(oct))
|
|
|
+ return 1;
|
|
|
+ atomic_set(&oct->status, OCT_DEV_PCI_ENABLE_DONE);
|
|
|
|
|
|
oct->chip_id = OCTEON_CN23XX_VF_VID;
|
|
|
pci_read_config_dword(oct->pci_dev, 8, &rev_id);
|
|
@@ -498,6 +2563,8 @@ static int octeon_device_init(struct octeon_device *oct)
|
|
|
|
|
|
atomic_set(&oct->status, OCT_DEV_PCI_MAP_DONE);
|
|
|
|
|
|
+ oct->app_mode = CVM_DRV_NIC_APP;
|
|
|
+
|
|
|
/* Initialize the dispatch mechanism used to push packets arriving on
|
|
|
* Octeon Output queues.
|
|
|
*/
|
|
@@ -594,6 +2661,9 @@ static int octeon_device_init(struct octeon_device *oct)
|
|
|
|
|
|
atomic_set(&oct->status, OCT_DEV_RUNNING);
|
|
|
|
|
|
+ if (liquidio_init_nic_module(oct))
|
|
|
+ return 1;
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
|