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@@ -1505,8 +1505,8 @@ static void iwl_trans_pcie_set_pmi(struct iwl_trans *trans, bool state)
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clear_bit(STATUS_TPOWER_PMI, &trans->status);
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}
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-static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent,
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- unsigned long *flags)
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+static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
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+ unsigned long *flags)
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{
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int ret;
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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@@ -1547,14 +1547,11 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent,
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CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
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if (unlikely(ret < 0)) {
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iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
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- if (!silent) {
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- u32 val = iwl_read32(trans, CSR_GP_CNTRL);
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- WARN_ONCE(1,
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- "Timeout waiting for hardware access (CSR_GP_CNTRL 0x%08x)\n",
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- val);
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- spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
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- return false;
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- }
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+ WARN_ONCE(1,
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+ "Timeout waiting for hardware access (CSR_GP_CNTRL 0x%08x)\n",
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+ iwl_read32(trans, CSR_GP_CNTRL));
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+ spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
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+ return false;
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}
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out:
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@@ -1602,7 +1599,7 @@ static int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr,
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int offs, ret = 0;
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u32 *vals = buf;
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- if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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+ if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
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for (offs = 0; offs < dwords; offs++)
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vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
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@@ -1620,7 +1617,7 @@ static int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,
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int offs, ret = 0;
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const u32 *vals = buf;
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- if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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+ if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);
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for (offs = 0; offs < dwords; offs++)
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iwl_write32(trans, HBUS_TARG_MEM_WDAT,
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@@ -2246,7 +2243,7 @@ static u32 iwl_trans_pcie_fh_regs_dump(struct iwl_trans *trans,
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__le32 *val;
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int i;
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- if (!iwl_trans_grab_nic_access(trans, false, &flags))
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+ if (!iwl_trans_grab_nic_access(trans, &flags))
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return 0;
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(*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_FH_REGS);
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@@ -2273,7 +2270,7 @@ iwl_trans_pci_dump_marbh_monitor(struct iwl_trans *trans,
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unsigned long flags;
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u32 i;
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- if (!iwl_trans_grab_nic_access(trans, false, &flags))
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+ if (!iwl_trans_grab_nic_access(trans, &flags))
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return 0;
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iwl_write_prph_no_grab(trans, MON_DMARB_RD_CTL_ADDR, 0x1);
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@@ -2658,7 +2655,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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goto out_pci_disable_msi;
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}
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- if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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+ if (iwl_trans_grab_nic_access(trans, &flags)) {
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u32 hw_step;
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hw_step = iwl_read_prph_no_grab(trans, WFPM_CTRL_REG);
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