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@@ -1,123 +0,0 @@
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-/*
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- * arch/arm/mach-at91/include/mach/hardware.h
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- *
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- * Copyright (C) 2003 SAN People
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- * Copyright (C) 2003 ATMEL
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- */
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-
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-#ifndef __ASM_ARCH_HARDWARE_H
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-#define __ASM_ARCH_HARDWARE_H
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-
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-#include <asm/sizes.h>
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-
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-/* DBGU base */
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-/* rm9200, 9260/9g20, 9261/9g10, 9rl */
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-#define AT91_BASE_DBGU0 0xfffff200
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-/* 9263, 9g45, sama5d3 */
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-#define AT91_BASE_DBGU1 0xffffee00
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-/* sama5d4 */
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-#define AT91_BASE_DBGU2 0xfc069000
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-
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-/*
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- * On all at91 except rm9200 and x40 have the System Controller starts
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- * at address 0xffffc000 and has a size of 16KiB.
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- *
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- * On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
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- * at 0xfffff000
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- *
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- * Removes the individual definitions of AT91_BASE_SYS and
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- * replaces them with a common version at base 0xfffffc000 and size 16KiB
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- * and map the same memory space
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- */
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-#define AT91_BASE_SYS 0xffffc000
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-
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-/*
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- * On sama5d4 there is no system controller, we map some needed peripherals
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- */
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-#define AT91_ALT_BASE_SYS 0xfc069000
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-
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-/*
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- * On all at91 have the Advanced Interrupt Controller starts at address
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- * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
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- */
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-#define AT91_AIC 0xfffff000
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-#define AT91_PMC 0xfffffc00
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-
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-/*
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- * Peripheral identifiers/interrupts.
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- */
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-#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
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-#define AT91_ID_SYS 1 /* System Peripherals */
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-
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-#ifdef CONFIG_MMU
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-/*
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- * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
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- * to 0xFEF78000 .. 0xFF000000. (544Kb)
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- */
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-#define AT91_IO_PHYS_BASE 0xFFF78000
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-#define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE)
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-
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-/*
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- * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000
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- * to 0xFB069000 .. 0xFB06F000. (24Kb)
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- */
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-#define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
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-#define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000)
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-#else
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-/*
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- * Identity mapping for the non MMU case.
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- */
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-#define AT91_IO_PHYS_BASE AT91_BASE_SYS
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-#define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE)
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-
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-#define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
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-#define AT91_ALT_IO_VIRT_BASE IOMEM(AT91_ALT_BASE_SYS)
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-#endif
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-
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-#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
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-
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- /* Convert a physical IO address to virtual IO address */
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-#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
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-#define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE)
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-
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-/*
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- * Virtual to Physical Address mapping for IO devices.
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- */
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-#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
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-#define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS)
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-
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- /* Internal SRAM is mapped below the IO devices */
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-#define AT91_SRAM_MAX SZ_1M
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-#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
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-
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-/* External Memory Map */
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-#define AT91_CHIPSELECT_0 0x10000000
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-#define AT91_CHIPSELECT_1 0x20000000
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-#define AT91_CHIPSELECT_2 0x30000000
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-#define AT91_CHIPSELECT_3 0x40000000
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-#define AT91_CHIPSELECT_4 0x50000000
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-#define AT91_CHIPSELECT_5 0x60000000
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-#define AT91_CHIPSELECT_6 0x70000000
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-#define AT91_CHIPSELECT_7 0x80000000
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-
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-/* Clocks */
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-#define AT91_SLOW_CLOCK 32768 /* slow clock */
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-
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-/*
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- * FIXME: this is needed to communicate between the pinctrl driver and
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- * the PM implementation in the machine. Possibly part of the PM
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- * implementation should be moved down into the pinctrl driver and get
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- * called as part of the generic suspend/resume path.
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- */
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-#ifndef __ASSEMBLY__
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-extern void at91_pinctrl_gpio_suspend(void);
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-extern void at91_pinctrl_gpio_resume(void);
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-#endif
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-
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-#endif
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