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@@ -63,6 +63,11 @@
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#define TPS65218_CHIPID_CHIP_MASK 0xF8
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#define TPS65218_CHIPID_CHIP_MASK 0xF8
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#define TPS65218_CHIPID_REV_MASK 0x07
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#define TPS65218_CHIPID_REV_MASK 0x07
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+#define TPS65218_REV_1_0 0x0
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+#define TPS65218_REV_1_1 0x1
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+#define TPS65218_REV_2_0 0x2
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+#define TPS65218_REV_2_1 0x3
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+
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#define TPS65218_INT1_VPRG BIT(5)
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#define TPS65218_INT1_VPRG BIT(5)
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#define TPS65218_INT1_AC BIT(4)
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#define TPS65218_INT1_AC BIT(4)
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#define TPS65218_INT1_PB BIT(3)
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#define TPS65218_INT1_PB BIT(3)
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