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@@ -47,6 +47,8 @@ struct imx6_pcie {
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#define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2 0x2
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#define PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK 0xf
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+#define PCIE_RC_LCSR 0x80
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+
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/* PCIe Port Logic registers (memory-mapped) */
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#define PL_OFFSET 0x700
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#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
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@@ -427,7 +429,7 @@ static int imx6_pcie_start_link(struct pcie_port *pp)
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return ret;
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}
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- tmp = readl(pp->dbi_base + 0x80);
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+ tmp = readl(pp->dbi_base + PCIE_RC_LCSR);
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dev_dbg(pp->dev, "Link up, Gen=%i\n", (tmp >> 16) & 0xf);
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return 0;
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}
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