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@@ -835,6 +835,8 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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if (direction == -1) {
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if (direction == -1) {
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/* other causes */
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/* other causes */
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msix_vector |= IXGBE_IVAR_ALLOC_VAL;
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msix_vector |= IXGBE_IVAR_ALLOC_VAL;
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@@ -871,6 +873,8 @@ static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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mask = (qmask & 0xFFFFFFFF);
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mask = (qmask & 0xFFFFFFFF);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
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mask = (qmask >> 32);
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mask = (qmask >> 32);
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@@ -2155,6 +2159,8 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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ixgbe_set_ivar(adapter, -1, 1, v_idx);
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ixgbe_set_ivar(adapter, -1, 1, v_idx);
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break;
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break;
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default:
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default:
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@@ -2264,6 +2270,8 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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/*
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/*
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* set the WDIS bit to not clear the timer bits and cause an
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* set the WDIS bit to not clear the timer bits and cause an
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* immediate assertion of the interrupt
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* immediate assertion of the interrupt
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@@ -2467,6 +2475,8 @@ static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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mask = (qmask & 0xFFFFFFFF);
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mask = (qmask & 0xFFFFFFFF);
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if (mask)
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if (mask)
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IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
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IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
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@@ -2493,6 +2503,8 @@ static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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mask = (qmask & 0xFFFFFFFF);
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mask = (qmask & 0xFFFFFFFF);
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if (mask)
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if (mask)
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IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
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IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
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@@ -2525,6 +2537,8 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
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mask |= IXGBE_EIMS_GPI_SDP0;
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mask |= IXGBE_EIMS_GPI_SDP0;
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break;
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break;
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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mask |= IXGBE_EIMS_TS;
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mask |= IXGBE_EIMS_TS;
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break;
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break;
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default:
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default:
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@@ -2536,7 +2550,10 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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mask |= IXGBE_EIMS_GPI_SDP1;
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mask |= IXGBE_EIMS_GPI_SDP1;
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mask |= IXGBE_EIMS_GPI_SDP2;
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mask |= IXGBE_EIMS_GPI_SDP2;
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+ /* fall through */
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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mask |= IXGBE_EIMS_ECC;
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mask |= IXGBE_EIMS_ECC;
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mask |= IXGBE_EIMS_MAILBOX;
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mask |= IXGBE_EIMS_MAILBOX;
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break;
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break;
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@@ -2544,9 +2561,6 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
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break;
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break;
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}
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}
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- if (adapter->hw.mac.type == ixgbe_mac_X540)
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- mask |= IXGBE_EIMS_TIMESYNC;
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-
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if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
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if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
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!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
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!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
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mask |= IXGBE_EIMS_FLOW_DIR;
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mask |= IXGBE_EIMS_FLOW_DIR;
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@@ -2592,6 +2606,8 @@ static irqreturn_t ixgbe_msix_other(int irq, void *data)
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switch (hw->mac.type) {
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switch (hw->mac.type) {
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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if (eicr & IXGBE_EICR_ECC) {
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if (eicr & IXGBE_EICR_ECC) {
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e_info(link, "Received ECC Err, initiating reset\n");
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e_info(link, "Received ECC Err, initiating reset\n");
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adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
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adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
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@@ -2811,6 +2827,8 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
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ixgbe_check_sfp_event(adapter, eicr);
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ixgbe_check_sfp_event(adapter, eicr);
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/* Fall through */
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/* Fall through */
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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if (eicr & IXGBE_EICR_ECC) {
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if (eicr & IXGBE_EICR_ECC) {
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e_info(link, "Received ECC Err, initiating reset\n");
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e_info(link, "Received ECC Err, initiating reset\n");
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adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
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adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
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@@ -2905,6 +2923,8 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
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@@ -3190,14 +3210,10 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
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IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
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IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
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}
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}
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-static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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+static void ixgbe_setup_reta(struct ixgbe_adapter *adapter, const u32 *seed)
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{
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{
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struct ixgbe_hw *hw = &adapter->hw;
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struct ixgbe_hw *hw = &adapter->hw;
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- static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
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- 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
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- 0x6A3E67EA, 0x14364D17, 0x3BED200D};
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- u32 mrqc = 0, reta = 0;
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- u32 rxcsum;
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+ u32 reta = 0;
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int i, j;
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int i, j;
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u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
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u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
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@@ -3223,6 +3239,16 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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if ((i & 3) == 3)
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if ((i & 3) == 3)
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IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
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IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
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}
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}
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+}
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+
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+static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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+{
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+ struct ixgbe_hw *hw = &adapter->hw;
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+ static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
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+ 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
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+ 0x6A3E67EA, 0x14364D17, 0x3BED200D};
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+ u32 mrqc = 0, rss_field = 0;
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+ u32 rxcsum;
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/* Disable indicating checksum in descriptor, enables RSS hash */
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/* Disable indicating checksum in descriptor, enables RSS hash */
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rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
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rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
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@@ -3255,16 +3281,18 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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}
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}
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/* Perform hash on these packet types */
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/* Perform hash on these packet types */
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- mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
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- IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
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- IXGBE_MRQC_RSS_FIELD_IPV6 |
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- IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
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+ rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
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+ IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
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+ IXGBE_MRQC_RSS_FIELD_IPV6 |
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+ IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
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if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
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if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
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- mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
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+ rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
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if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
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if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
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- mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
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+ rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
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+ ixgbe_setup_reta(adapter, seed);
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+ mrqc |= rss_field;
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
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}
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}
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@@ -3534,6 +3562,8 @@ static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
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u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
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u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
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switch (hw->mac.type) {
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switch (hw->mac.type) {
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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case ixgbe_mac_82598EB:
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case ixgbe_mac_82598EB:
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/*
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/*
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* For VMDq support of different descriptor types or
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* For VMDq support of different descriptor types or
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@@ -3657,6 +3687,8 @@ static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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for (i = 0; i < adapter->num_rx_queues; i++) {
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for (i = 0; i < adapter->num_rx_queues; i++) {
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struct ixgbe_ring *ring = adapter->rx_ring[i];
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struct ixgbe_ring *ring = adapter->rx_ring[i];
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@@ -3691,6 +3723,8 @@ static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
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break;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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for (i = 0; i < adapter->num_rx_queues; i++) {
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for (i = 0; i < adapter->num_rx_queues; i++) {
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struct ixgbe_ring *ring = adapter->rx_ring[i];
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struct ixgbe_ring *ring = adapter->rx_ring[i];
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@@ -4112,6 +4146,8 @@ static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
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/* Calculate delay value for device */
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/* Calculate delay value for device */
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switch (hw->mac.type) {
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switch (hw->mac.type) {
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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+ case ixgbe_mac_X550:
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+ case ixgbe_mac_X550EM_x:
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dv_id = IXGBE_DV_X540(link, tc);
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dv_id = IXGBE_DV_X540(link, tc);
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break;
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break;
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default:
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default:
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@@ -4170,6 +4206,8 @@ static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
|
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/* Calculate delay value for device */
|
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/* Calculate delay value for device */
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switch (hw->mac.type) {
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switch (hw->mac.type) {
|
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case ixgbe_mac_X540:
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case ixgbe_mac_X540:
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|
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+ case ixgbe_mac_X550:
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|
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+ case ixgbe_mac_X550EM_x:
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dv_id = IXGBE_LOW_DV_X540(tc);
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dv_id = IXGBE_LOW_DV_X540(tc);
|
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break;
|
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break;
|
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default:
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default:
|
|
@@ -4606,6 +4644,8 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
|
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break;
|
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break;
|
|
case ixgbe_mac_82599EB:
|
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case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_X540:
|
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case ixgbe_mac_X540:
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|
|
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+ case ixgbe_mac_X550:
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|
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+ case ixgbe_mac_X550EM_x:
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default:
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default:
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IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
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IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
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|
IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
|
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IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
|
|
@@ -4948,10 +4988,12 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
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IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
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IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
|
|
}
|
|
}
|
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|
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- /* Disable the Tx DMA engine on 82599 and X540 */
|
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|
|
|
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+ /* Disable the Tx DMA engine on 82599 and later MAC */
|
|
switch (hw->mac.type) {
|
|
switch (hw->mac.type) {
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_X540:
|
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case ixgbe_mac_X540:
|
|
|
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+ case ixgbe_mac_X550:
|
|
|
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+ case ixgbe_mac_X550EM_x:
|
|
IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
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IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
|
|
(IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
|
|
(IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
|
|
~IXGBE_DMATXCTL_TE));
|
|
~IXGBE_DMATXCTL_TE));
|
|
@@ -5071,6 +5113,12 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
|
|
if (fwsm & IXGBE_FWSM_TS_ENABLED)
|
|
if (fwsm & IXGBE_FWSM_TS_ENABLED)
|
|
adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
|
|
adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
|
|
break;
|
|
break;
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+#ifdef CONFIG_IXGBE_DCA
|
|
|
|
+ adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
|
|
|
|
+#endif
|
|
|
|
+ break;
|
|
default:
|
|
default:
|
|
break;
|
|
break;
|
|
}
|
|
}
|
|
@@ -5086,6 +5134,8 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
|
|
#ifdef CONFIG_IXGBE_DCB
|
|
#ifdef CONFIG_IXGBE_DCB
|
|
switch (hw->mac.type) {
|
|
switch (hw->mac.type) {
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
|
|
adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
|
|
adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
|
|
adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
|
|
break;
|
|
break;
|
|
@@ -5675,6 +5725,8 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
|
|
break;
|
|
break;
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
pci_wake_from_d3(pdev, !!wufc);
|
|
pci_wake_from_d3(pdev, !!wufc);
|
|
break;
|
|
break;
|
|
default:
|
|
default:
|
|
@@ -5806,6 +5858,8 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
|
|
break;
|
|
break;
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
hwstats->pxonrxc[i] +=
|
|
hwstats->pxonrxc[i] +=
|
|
IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
|
|
IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
|
|
break;
|
|
break;
|
|
@@ -5819,7 +5873,9 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
|
|
hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
|
|
hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
|
|
hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
|
|
hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
|
|
if ((hw->mac.type == ixgbe_mac_82599EB) ||
|
|
if ((hw->mac.type == ixgbe_mac_82599EB) ||
|
|
- (hw->mac.type == ixgbe_mac_X540)) {
|
|
|
|
|
|
+ (hw->mac.type == ixgbe_mac_X540) ||
|
|
|
|
+ (hw->mac.type == ixgbe_mac_X550) ||
|
|
|
|
+ (hw->mac.type == ixgbe_mac_X550EM_x)) {
|
|
hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
|
|
hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
|
|
IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
|
|
IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
|
|
hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
|
|
hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
|
|
@@ -5842,7 +5898,9 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
|
|
hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
|
|
hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
|
|
break;
|
|
break;
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
- /* OS2BMC stats are X540 only*/
|
|
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
|
|
+ /* OS2BMC stats are X540 and later */
|
|
hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
|
|
hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
|
|
hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
|
|
hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
|
|
hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
|
|
hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
|
|
@@ -6110,6 +6168,8 @@ static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
|
|
}
|
|
}
|
|
break;
|
|
break;
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
case ixgbe_mac_82599EB: {
|
|
case ixgbe_mac_82599EB: {
|
|
u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
|
|
u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
|
|
u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
|
|
u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
|
|
@@ -6221,6 +6281,10 @@ static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
|
|
if (!adapter->num_vfs)
|
|
if (!adapter->num_vfs)
|
|
return false;
|
|
return false;
|
|
|
|
|
|
|
|
+ /* resetting the PF is only needed for MAC before X550 */
|
|
|
|
+ if (hw->mac.type >= ixgbe_mac_X550)
|
|
|
|
+ return false;
|
|
|
|
+
|
|
for (i = 0; i < adapter->num_vfs; i++) {
|
|
for (i = 0; i < adapter->num_vfs; i++) {
|
|
for (j = 0; j < q_per_pool; j++) {
|
|
for (j = 0; j < q_per_pool; j++) {
|
|
u32 h, t;
|
|
u32 h, t;
|
|
@@ -6430,11 +6494,11 @@ static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
|
|
ciaa = (vf << 16) | 0x80000000;
|
|
ciaa = (vf << 16) | 0x80000000;
|
|
/* 32 bit read so align, we really want status at offset 6 */
|
|
/* 32 bit read so align, we really want status at offset 6 */
|
|
ciaa |= PCI_COMMAND;
|
|
ciaa |= PCI_COMMAND;
|
|
- IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
|
|
|
|
- ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
|
|
|
|
|
|
+ IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
|
|
|
|
+ ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_BY_MAC(hw));
|
|
ciaa &= 0x7FFFFFFF;
|
|
ciaa &= 0x7FFFFFFF;
|
|
/* disable debug mode asap after reading data */
|
|
/* disable debug mode asap after reading data */
|
|
- IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
|
|
|
|
|
|
+ IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
|
|
/* Get the upper 16 bits which will be the PCI status reg */
|
|
/* Get the upper 16 bits which will be the PCI status reg */
|
|
ciad >>= 16;
|
|
ciad >>= 16;
|
|
if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
|
|
if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
|
|
@@ -6442,11 +6506,11 @@ static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
|
|
/* Issue VFLR */
|
|
/* Issue VFLR */
|
|
ciaa = (vf << 16) | 0x80000000;
|
|
ciaa = (vf << 16) | 0x80000000;
|
|
ciaa |= 0xA8;
|
|
ciaa |= 0xA8;
|
|
- IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
|
|
|
|
|
|
+ IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
|
|
ciad = 0x00008000; /* VFLR */
|
|
ciad = 0x00008000; /* VFLR */
|
|
- IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
|
|
|
|
|
|
+ IXGBE_WRITE_REG(hw, IXGBE_CIAD_BY_MAC(hw), ciad);
|
|
ciaa &= 0x7FFFFFFF;
|
|
ciaa &= 0x7FFFFFFF;
|
|
- IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
|
|
|
|
|
|
+ IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
@@ -8098,6 +8162,8 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
switch (adapter->hw.mac.type) {
|
|
switch (adapter->hw.mac.type) {
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
|
|
IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
|
|
break;
|
|
break;
|
|
default:
|
|
default:
|
|
@@ -8161,6 +8227,8 @@ skip_sriov:
|
|
switch (adapter->hw.mac.type) {
|
|
switch (adapter->hw.mac.type) {
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_82599EB:
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
netdev->features |= NETIF_F_SCTP_CSUM;
|
|
netdev->features |= NETIF_F_SCTP_CSUM;
|
|
netdev->hw_features |= NETIF_F_SCTP_CSUM |
|
|
netdev->hw_features |= NETIF_F_SCTP_CSUM |
|
|
NETIF_F_NTUPLE;
|
|
NETIF_F_NTUPLE;
|
|
@@ -8514,6 +8582,12 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
|
|
case ixgbe_mac_X540:
|
|
case ixgbe_mac_X540:
|
|
device_id = IXGBE_X540_VF_DEVICE_ID;
|
|
device_id = IXGBE_X540_VF_DEVICE_ID;
|
|
break;
|
|
break;
|
|
|
|
+ case ixgbe_mac_X550:
|
|
|
|
+ device_id = IXGBE_DEV_ID_X550_VF;
|
|
|
|
+ break;
|
|
|
|
+ case ixgbe_mac_X550EM_x:
|
|
|
|
+ device_id = IXGBE_DEV_ID_X550EM_X_VF;
|
|
|
|
+ break;
|
|
default:
|
|
default:
|
|
device_id = 0;
|
|
device_id = 0;
|
|
break;
|
|
break;
|