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@@ -189,6 +189,7 @@
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#define MVNETA_GMAC_CTRL_0 0x2c00
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#define MVNETA_GMAC_MAX_RX_SIZE_SHIFT 2
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#define MVNETA_GMAC_MAX_RX_SIZE_MASK 0x7ffc
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+#define MVNETA_GMAC0_PORT_1000BASE_X BIT(1)
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#define MVNETA_GMAC0_PORT_ENABLE BIT(0)
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#define MVNETA_GMAC_CTRL_2 0x2c08
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#define MVNETA_GMAC2_INBAND_AN_ENABLE BIT(0)
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@@ -210,9 +211,13 @@
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#define MVNETA_GMAC_FORCE_LINK_DOWN BIT(0)
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#define MVNETA_GMAC_FORCE_LINK_PASS BIT(1)
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#define MVNETA_GMAC_INBAND_AN_ENABLE BIT(2)
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+#define MVNETA_GMAC_AN_BYPASS_ENABLE BIT(3)
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+#define MVNETA_GMAC_INBAND_RESTART_AN BIT(4)
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#define MVNETA_GMAC_CONFIG_MII_SPEED BIT(5)
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#define MVNETA_GMAC_CONFIG_GMII_SPEED BIT(6)
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#define MVNETA_GMAC_AN_SPEED_EN BIT(7)
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+#define MVNETA_GMAC_CONFIG_FLOW_CTRL BIT(8)
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+#define MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL BIT(9)
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#define MVNETA_GMAC_AN_FLOW_CTRL_EN BIT(11)
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#define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12)
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#define MVNETA_GMAC_AN_DUPLEX_EN BIT(13)
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@@ -3192,10 +3197,11 @@ static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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- /* We only support QSGMII, SGMII and RGMII modes */
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+ /* We only support QSGMII, SGMII, 802.3z and RGMII modes */
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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state->interface != PHY_INTERFACE_MODE_QSGMII &&
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state->interface != PHY_INTERFACE_MODE_SGMII &&
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+ !phy_interface_mode_is_8023z(state->interface) &&
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!phy_interface_mode_is_rgmii(state->interface)) {
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bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
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return;
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@@ -3208,10 +3214,14 @@ static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
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/* Half-duplex at speeds higher than 100Mbit is unsupported */
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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- phylink_set(mask, 10baseT_Half);
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- phylink_set(mask, 10baseT_Full);
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- phylink_set(mask, 100baseT_Half);
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- phylink_set(mask, 100baseT_Full);
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+
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+ if (!phy_interface_mode_is_8023z(state->interface)) {
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+ /* 10M and 100M are only supported in non-802.3z mode */
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+ phylink_set(mask, 10baseT_Half);
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+ phylink_set(mask, 10baseT_Full);
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+ phylink_set(mask, 100baseT_Half);
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+ phylink_set(mask, 100baseT_Full);
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+ }
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bitmap_and(supported, supported, mask,
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__ETHTOOL_LINK_MODE_MASK_NBITS);
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@@ -3243,14 +3253,27 @@ static int mvneta_mac_link_state(struct net_device *ndev,
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return 1;
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}
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+static void mvneta_mac_an_restart(struct net_device *ndev)
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+{
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+ struct mvneta_port *pp = netdev_priv(ndev);
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+ u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
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+
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+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
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+ gmac_an | MVNETA_GMAC_INBAND_RESTART_AN);
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+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
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+ gmac_an & ~MVNETA_GMAC_INBAND_RESTART_AN);
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+}
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+
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static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
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const struct phylink_link_state *state)
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{
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struct mvneta_port *pp = netdev_priv(ndev);
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+ u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0);
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u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
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u32 new_clk, gmac_clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
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u32 new_an, gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
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+ new_ctrl0 = gmac_ctrl0 & ~MVNETA_GMAC0_PORT_1000BASE_X;
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new_ctrl2 = gmac_ctrl2 & ~(MVNETA_GMAC2_INBAND_AN_ENABLE |
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MVNETA_GMAC2_PORT_RESET);
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new_clk = gmac_clk & ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
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@@ -3259,6 +3282,8 @@ static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
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MVNETA_GMAC_CONFIG_MII_SPEED |
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MVNETA_GMAC_CONFIG_GMII_SPEED |
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MVNETA_GMAC_AN_SPEED_EN |
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+ MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL |
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+ MVNETA_GMAC_CONFIG_FLOW_CTRL |
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MVNETA_GMAC_AN_FLOW_CTRL_EN |
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MVNETA_GMAC_CONFIG_FULL_DUPLEX |
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MVNETA_GMAC_AN_DUPLEX_EN);
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@@ -3269,7 +3294,8 @@ static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
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new_ctrl2 |= MVNETA_GMAC2_PORT_RGMII;
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if (state->interface == PHY_INTERFACE_MODE_QSGMII ||
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- state->interface == PHY_INTERFACE_MODE_SGMII)
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+ state->interface == PHY_INTERFACE_MODE_SGMII ||
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+ phy_interface_mode_is_8023z(state->interface))
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new_ctrl2 |= MVNETA_GMAC2_PCS_ENABLE;
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if (!phylink_autoneg_inband(mode)) {
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@@ -3281,7 +3307,7 @@ static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
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new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED;
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else if (state->speed == SPEED_100)
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new_an |= MVNETA_GMAC_CONFIG_MII_SPEED;
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- } else {
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+ } else if (state->interface == PHY_INTERFACE_MODE_SGMII) {
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/* SGMII mode receives the state from the PHY */
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new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE;
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new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
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@@ -3290,18 +3316,31 @@ static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
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MVNETA_GMAC_INBAND_AN_ENABLE |
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MVNETA_GMAC_AN_SPEED_EN |
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MVNETA_GMAC_AN_DUPLEX_EN;
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+ } else {
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+ /* 802.3z negotiation - only 1000base-X */
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+ new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X;
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+ new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
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+ new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN |
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+ MVNETA_GMAC_FORCE_LINK_PASS)) |
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+ MVNETA_GMAC_INBAND_AN_ENABLE |
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+ MVNETA_GMAC_CONFIG_GMII_SPEED |
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+ /* The MAC only supports FD mode */
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+ MVNETA_GMAC_CONFIG_FULL_DUPLEX;
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}
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/* Armada 370 documentation says we can only change the port mode
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* and in-band enable when the link is down, so force it down
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* while making these changes. We also do this for GMAC_CTRL2 */
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- if ((new_ctrl2 ^ gmac_ctrl2) & MVNETA_GMAC2_INBAND_AN_ENABLE ||
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+ if ((new_ctrl0 ^ gmac_ctrl0) & MVNETA_GMAC0_PORT_1000BASE_X ||
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+ (new_ctrl2 ^ gmac_ctrl2) & MVNETA_GMAC2_INBAND_AN_ENABLE ||
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(new_an ^ gmac_an) & MVNETA_GMAC_INBAND_AN_ENABLE) {
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mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
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(gmac_an & ~MVNETA_GMAC_FORCE_LINK_PASS) |
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MVNETA_GMAC_FORCE_LINK_DOWN);
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}
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+ if (new_ctrl0 != gmac_ctrl0)
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+ mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0);
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if (new_ctrl2 != gmac_ctrl2)
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mvreg_write(pp, MVNETA_GMAC_CTRL_2, new_ctrl2);
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if (new_clk != gmac_clk)
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@@ -3350,6 +3389,7 @@ static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode,
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static const struct phylink_mac_ops mvneta_phylink_ops = {
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.validate = mvneta_validate,
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.mac_link_state = mvneta_mac_link_state,
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+ .mac_an_restart = mvneta_mac_an_restart,
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.mac_config = mvneta_mac_config,
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.mac_link_down = mvneta_mac_link_down,
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.mac_link_up = mvneta_mac_link_up,
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@@ -4096,7 +4136,8 @@ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)
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if (phy_mode == PHY_INTERFACE_MODE_QSGMII)
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mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO);
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- else if (phy_mode == PHY_INTERFACE_MODE_SGMII)
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+ else if (phy_mode == PHY_INTERFACE_MODE_SGMII ||
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+ phy_mode == PHY_INTERFACE_MODE_1000BASEX)
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mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
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else if (!phy_interface_mode_is_rgmii(phy_mode))
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return -EINVAL;
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