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@@ -180,7 +180,6 @@ extern int amdgpu_powerplay;
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#define CIK_CURSOR_HEIGHT 128
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struct amdgpu_device;
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-struct amdgpu_fence;
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struct amdgpu_ib;
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struct amdgpu_vm;
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struct amdgpu_ring;
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@@ -403,16 +402,6 @@ struct amdgpu_fence_driver {
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#define AMDGPU_FENCE_FLAG_64BIT (1 << 0)
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#define AMDGPU_FENCE_FLAG_INT (1 << 1)
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-struct amdgpu_fence {
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- struct fence base;
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-
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- /* RB, DMA, etc. */
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- struct amdgpu_ring *ring;
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- uint64_t seq;
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-
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- wait_queue_t fence_wake;
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-};
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-
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struct amdgpu_user_fence {
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/* write-back bo */
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struct amdgpu_bo *bo;
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@@ -2108,20 +2097,6 @@ void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
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u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index);
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void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
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-/*
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- * Cast helper
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- */
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-extern const struct fence_ops amdgpu_fence_ops;
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-static inline struct amdgpu_fence *to_amdgpu_fence(struct fence *f)
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-{
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- struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base);
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-
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- if (__f->base.ops == &amdgpu_fence_ops)
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- return __f;
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-
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- return NULL;
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-}
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-
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/*
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* Registers read & write functions.
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*/
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