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@@ -908,6 +908,41 @@ static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
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spin_unlock_irqrestore(&xhci->lock, flags);
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}
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+static bool xhci_pending_portevent(struct xhci_hcd *xhci)
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+{
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+ struct xhci_port **ports;
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+ int port_index;
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+ u32 status;
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+ u32 portsc;
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+
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+ status = readl(&xhci->op_regs->status);
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+ if (status & STS_EINT)
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+ return true;
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+ /*
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+ * Checking STS_EINT is not enough as there is a lag between a change
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+ * bit being set and the Port Status Change Event that it generated
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+ * being written to the Event Ring. See note in xhci 1.1 section 4.19.2.
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+ */
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+
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+ port_index = xhci->usb2_rhub.num_ports;
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+ ports = xhci->usb2_rhub.ports;
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+ while (port_index--) {
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+ portsc = readl(ports[port_index]->addr);
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+ if (portsc & PORT_CHANGE_MASK ||
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+ (portsc & PORT_PLS_MASK) == XDEV_RESUME)
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+ return true;
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+ }
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+ port_index = xhci->usb3_rhub.num_ports;
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+ ports = xhci->usb3_rhub.ports;
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+ while (port_index--) {
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+ portsc = readl(ports[port_index]->addr);
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+ if (portsc & PORT_CHANGE_MASK ||
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+ (portsc & PORT_PLS_MASK) == XDEV_RESUME)
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+ return true;
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+ }
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+ return false;
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+}
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+
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/*
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* Stop HC (not bus-specific)
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*
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@@ -1009,7 +1044,7 @@ EXPORT_SYMBOL_GPL(xhci_suspend);
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*/
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int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
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{
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- u32 command, temp = 0, status;
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+ u32 command, temp = 0;
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struct usb_hcd *hcd = xhci_to_hcd(xhci);
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struct usb_hcd *secondary_hcd;
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int retval = 0;
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@@ -1134,8 +1169,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
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done:
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if (retval == 0) {
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/* Resume root hubs only when have pending events. */
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- status = readl(&xhci->op_regs->status);
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- if (status & STS_EINT) {
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+ if (xhci_pending_portevent(xhci)) {
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usb_hcd_resume_root_hub(xhci->shared_hcd);
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usb_hcd_resume_root_hub(hcd);
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}
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