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@@ -3825,8 +3825,6 @@ EXPORT_SYMBOL_GPL(nand_decode_ext_id);
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static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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- u8 *id_data = chip->id.data;
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- int maf_id = id_data[0];
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mtd->erasesize = type->erasesize;
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mtd->writesize = type->pagesize;
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@@ -3834,19 +3832,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
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/* All legacy ID NAND are small-page, SLC */
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chip->bits_per_cell = 1;
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-
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- /*
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- * Check for Spansion/AMD ID + repeating 5th, 6th byte since
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- * some Spansion chips have erasesize that conflicts with size
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- * listed in nand_ids table.
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- * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
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- */
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- if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
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- && id_data[6] == 0x00 && id_data[7] == 0x00
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- && mtd->writesize == 512) {
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- mtd->erasesize = 128 * 1024;
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- mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
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- }
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}
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/*
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@@ -3872,8 +3857,7 @@ static void nand_decode_bbm_options(struct nand_chip *chip)
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* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
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* AMD/Spansion, and Macronix. All others scan only the first page.
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*/
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- if (nand_is_slc(chip) &&
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- (maf_id == NAND_MFR_AMD || maf_id == NAND_MFR_MACRONIX))
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+ if (nand_is_slc(chip) && maf_id == NAND_MFR_MACRONIX)
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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}
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