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@@ -1293,6 +1293,51 @@ static const struct panel_desc shelly_sca07010_bfn_lnn = {
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.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
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};
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+static const struct drm_display_mode tpk_f07a_0102_mode = {
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+ .clock = 33260,
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+ .hdisplay = 800,
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+ .hsync_start = 800 + 40,
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+ .hsync_end = 800 + 40 + 128,
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+ .htotal = 800 + 40 + 128 + 88,
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+ .vdisplay = 480,
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+ .vsync_start = 480 + 10,
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+ .vsync_end = 480 + 10 + 2,
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+ .vtotal = 480 + 10 + 2 + 33,
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+ .vrefresh = 60,
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+};
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+
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+static const struct panel_desc tpk_f07a_0102 = {
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+ .modes = &tpk_f07a_0102_mode,
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+ .num_modes = 1,
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+ .size = {
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+ .width = 152,
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+ .height = 91,
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+ },
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+ .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
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+};
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+
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+static const struct drm_display_mode tpk_f10a_0102_mode = {
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+ .clock = 45000,
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+ .hdisplay = 1024,
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+ .hsync_start = 1024 + 176,
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+ .hsync_end = 1024 + 176 + 5,
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+ .htotal = 1024 + 176 + 5 + 88,
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+ .vdisplay = 600,
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+ .vsync_start = 600 + 20,
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+ .vsync_end = 600 + 20 + 5,
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+ .vtotal = 600 + 20 + 5 + 25,
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+ .vrefresh = 60,
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+};
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+
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+static const struct panel_desc tpk_f10a_0102 = {
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+ .modes = &tpk_f10a_0102_mode,
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+ .num_modes = 1,
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+ .size = {
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+ .width = 223,
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+ .height = 125,
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+ },
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+};
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+
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static const struct display_timing urt_umsh_8596md_timing = {
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.pixelclock = { 33260000, 33260000, 33260000 },
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.hactive = { 800, 800, 800 },
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@@ -1444,6 +1489,12 @@ static const struct of_device_id platform_of_match[] = {
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}, {
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.compatible = "shelly,sca07010-bfn-lnn",
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.data = &shelly_sca07010_bfn_lnn,
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+ }, {
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+ .compatible = "tpk,f07a-0102",
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+ .data = &tpk_f07a_0102,
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+ }, {
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+ .compatible = "tpk,f10a-0102",
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+ .data = &tpk_f10a_0102,
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}, {
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.compatible = "urt,umsh-8596md-t",
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.data = &urt_umsh_8596md_parallel,
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