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@@ -3760,24 +3760,148 @@ void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
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if (v4) {
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t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, val,
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ARRAY_SIZE(val), TP_MIB_TCP_OUT_RST_A);
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- v4->tcpOutRsts = STAT(OUT_RST);
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- v4->tcpInSegs = STAT64(IN_SEG);
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- v4->tcpOutSegs = STAT64(OUT_SEG);
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- v4->tcpRetransSegs = STAT64(RXT_SEG);
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+ v4->tcp_out_rsts = STAT(OUT_RST);
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+ v4->tcp_in_segs = STAT64(IN_SEG);
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+ v4->tcp_out_segs = STAT64(OUT_SEG);
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+ v4->tcp_retrans_segs = STAT64(RXT_SEG);
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}
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if (v6) {
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t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, val,
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ARRAY_SIZE(val), TP_MIB_TCP_V6OUT_RST_A);
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- v6->tcpOutRsts = STAT(OUT_RST);
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- v6->tcpInSegs = STAT64(IN_SEG);
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- v6->tcpOutSegs = STAT64(OUT_SEG);
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- v6->tcpRetransSegs = STAT64(RXT_SEG);
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+ v6->tcp_out_rsts = STAT(OUT_RST);
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+ v6->tcp_in_segs = STAT64(IN_SEG);
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+ v6->tcp_out_segs = STAT64(OUT_SEG);
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+ v6->tcp_retrans_segs = STAT64(RXT_SEG);
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}
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#undef STAT64
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#undef STAT
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#undef STAT_IDX
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}
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+/**
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+ * t4_tp_get_err_stats - read TP's error MIB counters
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+ * @adap: the adapter
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+ * @st: holds the counter values
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+ *
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+ * Returns the values of TP's error counters.
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+ */
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+void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st)
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+{
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+ /* T6 and later has 2 channels */
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+ if (adap->params.arch.nchan == NCHAN) {
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->mac_in_errs, 12, TP_MIB_MAC_IN_ERR_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tnl_cong_drops, 8,
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+ TP_MIB_TNL_CNG_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tnl_tx_drops, 4,
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+ TP_MIB_TNL_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->ofld_vlan_drops, 4,
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+ TP_MIB_OFD_VLN_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tcp6_in_errs, 4,
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+ TP_MIB_TCP_V6IN_ERR_0_A);
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+ } else {
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->mac_in_errs, 2, TP_MIB_MAC_IN_ERR_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->hdr_in_errs, 2, TP_MIB_HDR_IN_ERR_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tcp_in_errs, 2, TP_MIB_TCP_IN_ERR_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tnl_cong_drops, 2,
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+ TP_MIB_TNL_CNG_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->ofld_chan_drops, 2,
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+ TP_MIB_OFD_CHN_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tnl_tx_drops, 2, TP_MIB_TNL_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->ofld_vlan_drops, 2,
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+ TP_MIB_OFD_VLN_DROP_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ st->tcp6_in_errs, 2, TP_MIB_TCP_V6IN_ERR_0_A);
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+ }
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A,
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+ &st->ofld_no_neigh, 2, TP_MIB_OFD_ARP_DROP_A);
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+}
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+
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+/**
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+ * t4_tp_get_cpl_stats - read TP's CPL MIB counters
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+ * @adap: the adapter
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+ * @st: holds the counter values
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+ *
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+ * Returns the values of TP's CPL counters.
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+ */
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+void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st)
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+{
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+ /* T6 and later has 2 channels */
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+ if (adap->params.arch.nchan == NCHAN) {
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, st->req,
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+ 8, TP_MIB_CPL_IN_REQ_0_A);
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+ } else {
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, st->req,
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+ 2, TP_MIB_CPL_IN_REQ_0_A);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, st->rsp,
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+ 2, TP_MIB_CPL_OUT_RSP_0_A);
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+ }
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+}
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+
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+/**
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+ * t4_tp_get_rdma_stats - read TP's RDMA MIB counters
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+ * @adap: the adapter
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+ * @st: holds the counter values
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+ *
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+ * Returns the values of TP's RDMA counters.
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+ */
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+void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st)
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+{
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, &st->rqe_dfr_pkt,
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+ 2, TP_MIB_RQE_DFR_PKT_A);
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+}
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+
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+/**
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+ * t4_get_fcoe_stats - read TP's FCoE MIB counters for a port
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+ * @adap: the adapter
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+ * @idx: the port index
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+ * @st: holds the counter values
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+ *
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+ * Returns the values of TP's FCoE counters for the selected port.
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+ */
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+void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
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+ struct tp_fcoe_stats *st)
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+{
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+ u32 val[2];
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+
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, &st->frames_ddp,
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+ 1, TP_MIB_FCOE_DDP_0_A + idx);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, &st->frames_drop,
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+ 1, TP_MIB_FCOE_DROP_0_A + idx);
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, val,
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+ 2, TP_MIB_FCOE_BYTE_0_HI_A + 2 * idx);
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+ st->octets_ddp = ((u64)val[0] << 32) | val[1];
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+}
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+
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+/**
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+ * t4_get_usm_stats - read TP's non-TCP DDP MIB counters
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+ * @adap: the adapter
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+ * @st: holds the counter values
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+ *
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+ * Returns the values of TP's counters for non-TCP directly-placed packets.
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+ */
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+void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st)
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+{
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+ u32 val[4];
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+
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+ t4_read_indirect(adap, TP_MIB_INDEX_A, TP_MIB_DATA_A, val, 4,
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+ TP_MIB_USM_PKTS_A);
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+ st->frames = val[0];
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+ st->drops = val[1];
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+ st->octets = ((u64)val[2] << 32) | val[3];
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+}
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+
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/**
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* t4_read_mtu_tbl - returns the values in the HW path MTU table
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* @adap: the adapter
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@@ -4034,6 +4158,28 @@ const char *t4_get_port_type_description(enum fw_port_type port_type)
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return "UNKNOWN";
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}
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+/**
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+ * t4_get_port_stats_offset - collect port stats relative to a previous
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+ * snapshot
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+ * @adap: The adapter
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+ * @idx: The port
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+ * @stats: Current stats to fill
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+ * @offset: Previous stats snapshot
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+ */
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+void t4_get_port_stats_offset(struct adapter *adap, int idx,
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+ struct port_stats *stats,
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+ struct port_stats *offset)
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+{
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+ u64 *s, *o;
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+ int i;
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+
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+ t4_get_port_stats(adap, idx, stats);
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+ for (i = 0, s = (u64 *)stats, o = (u64 *)offset;
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+ i < (sizeof(struct port_stats) / sizeof(u64));
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+ i++, s++, o++)
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+ *s -= *o;
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+}
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+
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/**
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* t4_get_port_stats - collect port statistics
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* @adap: the adapter
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@@ -4118,103 +4264,51 @@ void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
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}
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/**
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- * t4_wol_magic_enable - enable/disable magic packet WoL
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- * @adap: the adapter
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- * @port: the physical port index
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- * @addr: MAC address expected in magic packets, %NULL to disable
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- *
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- * Enables/disables magic packet wake-on-LAN for the selected port.
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- */
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-void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
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- const u8 *addr)
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-{
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- u32 mag_id_reg_l, mag_id_reg_h, port_cfg_reg;
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-
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- if (is_t4(adap->params.chip)) {
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- mag_id_reg_l = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_LO);
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- mag_id_reg_h = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_HI);
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- port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2_A);
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- } else {
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- mag_id_reg_l = T5_PORT_REG(port, MAC_PORT_MAGIC_MACID_LO);
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- mag_id_reg_h = T5_PORT_REG(port, MAC_PORT_MAGIC_MACID_HI);
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- port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2_A);
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- }
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-
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- if (addr) {
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- t4_write_reg(adap, mag_id_reg_l,
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- (addr[2] << 24) | (addr[3] << 16) |
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- (addr[4] << 8) | addr[5]);
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- t4_write_reg(adap, mag_id_reg_h,
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- (addr[0] << 8) | addr[1]);
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- }
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- t4_set_reg_field(adap, port_cfg_reg, MAGICEN_F,
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- addr ? MAGICEN_F : 0);
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-}
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-
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-/**
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- * t4_wol_pat_enable - enable/disable pattern-based WoL
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+ * t4_get_lb_stats - collect loopback port statistics
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* @adap: the adapter
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- * @port: the physical port index
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- * @map: bitmap of which HW pattern filters to set
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- * @mask0: byte mask for bytes 0-63 of a packet
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- * @mask1: byte mask for bytes 64-127 of a packet
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- * @crc: Ethernet CRC for selected bytes
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- * @enable: enable/disable switch
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+ * @idx: the loopback port index
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+ * @p: the stats structure to fill
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*
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- * Sets the pattern filters indicated in @map to mask out the bytes
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- * specified in @mask0/@mask1 in received packets and compare the CRC of
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- * the resulting packet against @crc. If @enable is %true pattern-based
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- * WoL is enabled, otherwise disabled.
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+ * Return HW statistics for the given loopback port.
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*/
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-int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
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- u64 mask0, u64 mask1, unsigned int crc, bool enable)
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+void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p)
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{
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- int i;
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- u32 port_cfg_reg;
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-
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- if (is_t4(adap->params.chip))
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- port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2_A);
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- else
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- port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2_A);
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-
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- if (!enable) {
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- t4_set_reg_field(adap, port_cfg_reg, PATEN_F, 0);
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- return 0;
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- }
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- if (map > 0xff)
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- return -EINVAL;
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+ u32 bgmap = t4_get_mps_bg_map(adap, idx);
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-#define EPIO_REG(name) \
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+#define GET_STAT(name) \
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+ t4_read_reg64(adap, \
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(is_t4(adap->params.chip) ? \
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- PORT_REG(port, XGMAC_PORT_EPIO_##name##_A) : \
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- T5_PORT_REG(port, MAC_PORT_EPIO_##name##_A))
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+ PORT_REG(idx, MPS_PORT_STAT_LB_PORT_##name##_L) : \
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+ T5_PORT_REG(idx, MPS_PORT_STAT_LB_PORT_##name##_L)))
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+#define GET_STAT_COM(name) t4_read_reg64(adap, MPS_STAT_##name##_L)
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- t4_write_reg(adap, EPIO_REG(DATA1), mask0 >> 32);
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- t4_write_reg(adap, EPIO_REG(DATA2), mask1);
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- t4_write_reg(adap, EPIO_REG(DATA3), mask1 >> 32);
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+ p->octets = GET_STAT(BYTES);
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+ p->frames = GET_STAT(FRAMES);
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+ p->bcast_frames = GET_STAT(BCAST);
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+ p->mcast_frames = GET_STAT(MCAST);
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+ p->ucast_frames = GET_STAT(UCAST);
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+ p->error_frames = GET_STAT(ERROR);
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+
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+ p->frames_64 = GET_STAT(64B);
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+ p->frames_65_127 = GET_STAT(65B_127B);
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+ p->frames_128_255 = GET_STAT(128B_255B);
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+ p->frames_256_511 = GET_STAT(256B_511B);
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+ p->frames_512_1023 = GET_STAT(512B_1023B);
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+ p->frames_1024_1518 = GET_STAT(1024B_1518B);
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+ p->frames_1519_max = GET_STAT(1519B_MAX);
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+ p->drop = GET_STAT(DROP_FRAMES);
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+
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+ p->ovflow0 = (bgmap & 1) ? GET_STAT_COM(RX_BG_0_LB_DROP_FRAME) : 0;
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+ p->ovflow1 = (bgmap & 2) ? GET_STAT_COM(RX_BG_1_LB_DROP_FRAME) : 0;
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+ p->ovflow2 = (bgmap & 4) ? GET_STAT_COM(RX_BG_2_LB_DROP_FRAME) : 0;
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+ p->ovflow3 = (bgmap & 8) ? GET_STAT_COM(RX_BG_3_LB_DROP_FRAME) : 0;
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+ p->trunc0 = (bgmap & 1) ? GET_STAT_COM(RX_BG_0_LB_TRUNC_FRAME) : 0;
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+ p->trunc1 = (bgmap & 2) ? GET_STAT_COM(RX_BG_1_LB_TRUNC_FRAME) : 0;
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+ p->trunc2 = (bgmap & 4) ? GET_STAT_COM(RX_BG_2_LB_TRUNC_FRAME) : 0;
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+ p->trunc3 = (bgmap & 8) ? GET_STAT_COM(RX_BG_3_LB_TRUNC_FRAME) : 0;
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- for (i = 0; i < NWOL_PAT; i++, map >>= 1) {
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- if (!(map & 1))
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- continue;
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-
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- /* write byte masks */
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- t4_write_reg(adap, EPIO_REG(DATA0), mask0);
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- t4_write_reg(adap, EPIO_REG(OP), ADDRESS_V(i) | EPIOWR_F);
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- t4_read_reg(adap, EPIO_REG(OP)); /* flush */
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- if (t4_read_reg(adap, EPIO_REG(OP)) & SF_BUSY_F)
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- return -ETIMEDOUT;
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-
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- /* write CRC */
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- t4_write_reg(adap, EPIO_REG(DATA0), crc);
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- t4_write_reg(adap, EPIO_REG(OP), ADDRESS_V(i + 32) | EPIOWR_F);
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- t4_read_reg(adap, EPIO_REG(OP)); /* flush */
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- if (t4_read_reg(adap, EPIO_REG(OP)) & SF_BUSY_F)
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- return -ETIMEDOUT;
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- }
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-#undef EPIO_REG
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-
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- t4_set_reg_field(adap, PORT_REG(port, XGMAC_PORT_CFG2_A), 0, PATEN_F);
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- return 0;
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+#undef GET_STAT
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+#undef GET_STAT_COM
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}
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/* t4_mk_filtdelwr - create a delete filter WR
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