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@@ -199,50 +199,42 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
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chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
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/* If this is not event ring, there is one less usable TRB */
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- if (ring->type != TYPE_EVENT &&
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- !last_trb(xhci, ring, ring->enq_seg, ring->enqueue))
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+ if (!last_trb(xhci, ring, ring->enq_seg, ring->enqueue))
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ring->num_trbs_free--;
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next = ++(ring->enqueue);
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ring->enq_updates++;
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- /* Update the dequeue pointer further if that was a link TRB or we're at
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- * the end of an event ring segment (which doesn't have link TRBS)
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- */
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+ /* Update the dequeue pointer further if that was a link TRB */
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while (last_trb(xhci, ring, ring->enq_seg, next)) {
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- if (ring->type != TYPE_EVENT) {
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- /*
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- * If the caller doesn't plan on enqueueing more
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- * TDs before ringing the doorbell, then we
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- * don't want to give the link TRB to the
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- * hardware just yet. We'll give the link TRB
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- * back in prepare_ring() just before we enqueue
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- * the TD at the top of the ring.
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- */
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- if (!chain && !more_trbs_coming)
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- break;
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- /* If we're not dealing with 0.95 hardware or
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- * isoc rings on AMD 0.96 host,
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- * carry over the chain bit of the previous TRB
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- * (which may mean the chain bit is cleared).
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- */
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- if (!(ring->type == TYPE_ISOC &&
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- (xhci->quirks & XHCI_AMD_0x96_HOST))
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- && !xhci_link_trb_quirk(xhci)) {
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- next->link.control &=
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- cpu_to_le32(~TRB_CHAIN);
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- next->link.control |=
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- cpu_to_le32(chain);
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- }
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- /* Give this link TRB to the hardware */
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- wmb();
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- next->link.control ^= cpu_to_le32(TRB_CYCLE);
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+ /*
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+ * If the caller doesn't plan on enqueueing more TDs before
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+ * ringing the doorbell, then we don't want to give the link TRB
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+ * to the hardware just yet. We'll give the link TRB back in
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+ * prepare_ring() just before we enqueue the TD at the top of
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+ * the ring.
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+ */
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+ if (!chain && !more_trbs_coming)
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+ break;
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- /* Toggle the cycle bit after the last ring segment. */
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- if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
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- ring->cycle_state ^= 1;
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- }
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+ /* If we're not dealing with 0.95 hardware or isoc rings on
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+ * AMD 0.96 host, carry over the chain bit of the previous TRB
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+ * (which may mean the chain bit is cleared).
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+ */
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+ if (!(ring->type == TYPE_ISOC &&
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+ (xhci->quirks & XHCI_AMD_0x96_HOST)) &&
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+ !xhci_link_trb_quirk(xhci)) {
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+ next->link.control &= cpu_to_le32(~TRB_CHAIN);
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+ next->link.control |= cpu_to_le32(chain);
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}
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+ /* Give this link TRB to the hardware */
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+ wmb();
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+ next->link.control ^= cpu_to_le32(TRB_CYCLE);
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+
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+ /* Toggle the cycle bit after the last ring segment. */
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+ if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next))
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+ ring->cycle_state ^= 1;
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+
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ring->enq_seg = ring->enq_seg->next;
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ring->enqueue = ring->enq_seg->trbs;
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next = ring->enqueue;
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