|
@@ -123,21 +123,12 @@ resource_size_t pcibios_window_alignment(struct pci_bus *bus,
|
|
|
|
|
|
void pcibios_reset_secondary_bus(struct pci_dev *dev)
|
|
|
{
|
|
|
- u16 ctrl;
|
|
|
-
|
|
|
if (ppc_md.pcibios_reset_secondary_bus) {
|
|
|
ppc_md.pcibios_reset_secondary_bus(dev);
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
- pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &ctrl);
|
|
|
- ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
|
|
|
- pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl);
|
|
|
- msleep(2);
|
|
|
-
|
|
|
- ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
|
|
|
- pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl);
|
|
|
- ssleep(1);
|
|
|
+ pci_reset_secondary_bus(dev);
|
|
|
}
|
|
|
|
|
|
static resource_size_t pcibios_io_size(const struct pci_controller *hose)
|