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@@ -1,57 +1,7 @@
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+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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- * This file is provided under a dual BSD/GPLv2 license. When using or
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- * redistributing this file, you may do so under either license.
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- *
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- * GPL LICENSE SUMMARY
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- *
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- * Copyright (c) 2016 AmLogic, Inc.
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- * Author: Michael Turquette <mturquette@baylibre.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of version 2 of the GNU General Public License as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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- * General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, write to the Free Software
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- * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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- * The full GNU General Public License is included in this distribution
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- * in the file called COPYING
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- *
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- * BSD LICENSE
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- *
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* Copyright (c) 2016 AmLogic, Inc.
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* Author: Michael Turquette <mturquette@baylibre.com>
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- *
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- * Redistribution and use in source and binary forms, with or without
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- * modification, are permitted provided that the following conditions
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- * are met:
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- *
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- * * Redistributions of source code must retain the above copyright
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- * notice, this list of conditions and the following disclaimer.
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- * * Redistributions in binary form must reproduce the above copyright
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- * notice, this list of conditions and the following disclaimer in
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- * the documentation and/or other materials provided with the
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- * distribution.
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- * * Neither the name of Intel Corporation nor the names of its
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- * contributors may be used to endorse or promote products derived
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- * from this software without specific prior written permission.
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- *
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- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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@@ -89,10 +39,23 @@ static long rate_from_params(unsigned long parent_rate,
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static void params_from_rate(unsigned long requested_rate,
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unsigned long parent_rate,
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unsigned int *sdm,
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- unsigned int *n2)
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+ unsigned int *n2,
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+ u8 flags)
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{
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uint64_t div = parent_rate;
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- unsigned long rem = do_div(div, requested_rate);
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+ uint64_t frac = do_div(div, requested_rate);
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+
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+ frac *= SDM_DEN;
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+
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+ if (flags & CLK_MESON_MPLL_ROUND_CLOSEST)
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+ *sdm = DIV_ROUND_CLOSEST_ULL(frac, requested_rate);
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+ else
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+ *sdm = DIV_ROUND_UP_ULL(frac, requested_rate);
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+
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+ if (*sdm == SDM_DEN) {
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+ *sdm = 0;
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+ div += 1;
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+ }
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if (div < N2_MIN) {
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*n2 = N2_MIN;
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@@ -102,7 +65,6 @@ static void params_from_rate(unsigned long requested_rate,
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*sdm = SDM_DEN - 1;
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} else {
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*n2 = div;
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- *sdm = DIV_ROUND_UP_ULL((u64)rem * SDM_DEN, requested_rate);
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}
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}
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@@ -125,9 +87,11 @@ static long mpll_round_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long *parent_rate)
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{
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+ struct clk_regmap *clk = to_clk_regmap(hw);
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+ struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk);
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unsigned int sdm, n2;
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- params_from_rate(rate, *parent_rate, &sdm, &n2);
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+ params_from_rate(rate, *parent_rate, &sdm, &n2, mpll->flags);
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return rate_from_params(*parent_rate, sdm, n2);
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}
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@@ -140,7 +104,7 @@ static int mpll_set_rate(struct clk_hw *hw,
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unsigned int sdm, n2;
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unsigned long flags = 0;
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- params_from_rate(rate, parent_rate, &sdm, &n2);
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+ params_from_rate(rate, parent_rate, &sdm, &n2, mpll->flags);
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if (mpll->lock)
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spin_lock_irqsave(mpll->lock, flags);
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