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ARC: IRQ: Use hwirq instead of virq in mask/unmask

It is necessary to use hwirq instead of virq when you communicate
with an interrupt controller since there is no guaranty that virq
numbers match hwirq numbers.

Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Yuriy Kolerov 8 years ago
parent
commit
2163266c27
2 changed files with 5 additions and 5 deletions
  1. 3 3
      arch/arc/kernel/intc-arcv2.c
  2. 2 2
      arch/arc/kernel/intc-compact.c

+ 3 - 3
arch/arc/kernel/intc-arcv2.c

@@ -77,20 +77,20 @@ void arc_init_IRQ(void)
 
 
 static void arcv2_irq_mask(struct irq_data *data)
 static void arcv2_irq_mask(struct irq_data *data)
 {
 {
-	write_aux_reg(AUX_IRQ_SELECT, data->irq);
+	write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
 	write_aux_reg(AUX_IRQ_ENABLE, 0);
 	write_aux_reg(AUX_IRQ_ENABLE, 0);
 }
 }
 
 
 static void arcv2_irq_unmask(struct irq_data *data)
 static void arcv2_irq_unmask(struct irq_data *data)
 {
 {
-	write_aux_reg(AUX_IRQ_SELECT, data->irq);
+	write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
 	write_aux_reg(AUX_IRQ_ENABLE, 1);
 	write_aux_reg(AUX_IRQ_ENABLE, 1);
 }
 }
 
 
 void arcv2_irq_enable(struct irq_data *data)
 void arcv2_irq_enable(struct irq_data *data)
 {
 {
 	/* set default priority */
 	/* set default priority */
-	write_aux_reg(AUX_IRQ_SELECT, data->irq);
+	write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
 	write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
 	write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
 
 
 	/*
 	/*

+ 2 - 2
arch/arc/kernel/intc-compact.c

@@ -57,7 +57,7 @@ static void arc_irq_mask(struct irq_data *data)
 	unsigned int ienb;
 	unsigned int ienb;
 
 
 	ienb = read_aux_reg(AUX_IENABLE);
 	ienb = read_aux_reg(AUX_IENABLE);
-	ienb &= ~(1 << data->irq);
+	ienb &= ~(1 << data->hwirq);
 	write_aux_reg(AUX_IENABLE, ienb);
 	write_aux_reg(AUX_IENABLE, ienb);
 }
 }
 
 
@@ -66,7 +66,7 @@ static void arc_irq_unmask(struct irq_data *data)
 	unsigned int ienb;
 	unsigned int ienb;
 
 
 	ienb = read_aux_reg(AUX_IENABLE);
 	ienb = read_aux_reg(AUX_IENABLE);
-	ienb |= (1 << data->irq);
+	ienb |= (1 << data->hwirq);
 	write_aux_reg(AUX_IENABLE, ienb);
 	write_aux_reg(AUX_IENABLE, ienb);
 }
 }