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@@ -40,6 +40,10 @@
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#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
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#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
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#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */
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#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */
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+#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
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+#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
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+#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
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+
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/*
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/*
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* SDRAM configuration registers.
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* SDRAM configuration registers.
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*/
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*/
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@@ -72,9 +76,9 @@
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/*
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/*
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* UART module.
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* UART module.
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*/
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*/
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-#define MCFUART_BASE1 (MCF_IPSBAR + 0x200)
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-#define MCFUART_BASE2 (MCF_IPSBAR + 0x240)
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-#define MCFUART_BASE3 (MCF_IPSBAR + 0x280)
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+#define MCFUART_BASE0 (MCF_IPSBAR + 0x200)
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+#define MCFUART_BASE1 (MCF_IPSBAR + 0x240)
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+#define MCFUART_BASE2 (MCF_IPSBAR + 0x280)
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/*
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/*
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* FEC ethernet module.
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* FEC ethernet module.
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