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@@ -157,11 +157,13 @@ static u32 dsi_clk_from_pclk(u32 pclk, int pixel_format, int lane_count)
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#endif
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-static int dsi_calc_mnp(int target_dsi_clk, struct dsi_mnp *dsi_mnp)
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+static int dsi_calc_mnp(struct drm_i915_private *dev_priv,
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+ struct dsi_mnp *dsi_mnp, int target_dsi_clk)
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{
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unsigned int calc_m = 0, calc_p = 0;
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- unsigned int m, n = 1, p;
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- int ref_clk = 25000;
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+ unsigned int m_min, m_max, p_min = 2, p_max = 6;
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+ unsigned int m, n, p;
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+ int ref_clk;
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int delta = target_dsi_clk;
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u32 m_seed;
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@@ -171,8 +173,20 @@ static int dsi_calc_mnp(int target_dsi_clk, struct dsi_mnp *dsi_mnp)
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return -ECHRNG;
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}
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- for (m = 62; m <= 92 && delta; m++) {
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- for (p = 2; p <= 6 && delta; p++) {
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+ if (IS_CHERRYVIEW(dev_priv)) {
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+ ref_clk = 100000;
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+ n = 4;
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+ m_min = 70;
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+ m_max = 96;
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+ } else {
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+ ref_clk = 25000;
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+ n = 1;
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+ m_min = 62;
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+ m_max = 92;
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+ }
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+
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+ for (m = m_min; m <= m_max && delta; m++) {
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+ for (p = p_min; p <= p_max && delta; p++) {
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/*
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* Find the optimal m and p divisors with minimal delta
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* +/- the required clock
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@@ -212,7 +226,7 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
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dsi_clk = dsi_clk_from_pclk(intel_dsi->pclk, intel_dsi->pixel_format,
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intel_dsi->lane_count);
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- ret = dsi_calc_mnp(dsi_clk, &dsi_mnp);
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+ ret = dsi_calc_mnp(dev_priv, &dsi_mnp, dsi_clk);
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if (ret) {
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DRM_DEBUG_KMS("dsi_calc_mnp failed\n");
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return;
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