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@@ -90,8 +90,6 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work);
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*/
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int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
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{
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- struct amdgpu_ring *ring;
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- struct drm_sched_rq *rq;
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const char *fw_name;
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const struct common_firmware_header *hdr;
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unsigned ucode_version, version_major, version_minor, binary_id;
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@@ -188,14 +186,6 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
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return r;
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}
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- ring = &adev->vce.ring[0];
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- rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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- r = drm_sched_entity_init(&adev->vce.entity, &rq, 1, NULL);
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- if (r != 0) {
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- DRM_ERROR("Failed setting up VCE run queue.\n");
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- return r;
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- }
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-
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for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {
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atomic_set(&adev->vce.handles[i], 0);
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adev->vce.filp[i] = NULL;
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@@ -235,6 +225,29 @@ int amdgpu_vce_sw_fini(struct amdgpu_device *adev)
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return 0;
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}
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+/**
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+ * amdgpu_vce_entity_init - init entity
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+ *
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+ * @adev: amdgpu_device pointer
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+ *
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+ */
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+int amdgpu_vce_entity_init(struct amdgpu_device *adev)
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+{
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+ struct amdgpu_ring *ring;
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+ struct drm_sched_rq *rq;
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+ int r;
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+
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+ ring = &adev->vce.ring[0];
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+ rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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+ r = drm_sched_entity_init(&adev->vce.entity, &rq, 1, NULL);
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+ if (r != 0) {
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+ DRM_ERROR("Failed setting up VCE run queue.\n");
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+ return r;
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+ }
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+
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+ return 0;
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+}
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+
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/**
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* amdgpu_vce_suspend - unpin VCE fw memory
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*
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