|
@@ -552,7 +552,8 @@ static const struct clk_ops si5351_pll_ops = {
|
|
|
* MSx_P2[19:0] = 128 * b - c * floor(128 * b/c) = (128*b) mod c
|
|
|
* MSx_P3[19:0] = c
|
|
|
*
|
|
|
- * MS[6,7] are integer (P1) divide only, P2 = 0, P3 = 0
|
|
|
+ * MS[6,7] are integer (P1) divide only, P1 = divide value,
|
|
|
+ * P2 and P3 are not applicable
|
|
|
*
|
|
|
* for 150MHz < fOUT <= 160MHz:
|
|
|
*
|
|
@@ -679,6 +680,16 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate,
|
|
|
c = 1;
|
|
|
|
|
|
*parent_rate = a * rate;
|
|
|
+ } else if (hwdata->num >= 6) {
|
|
|
+ /* determine the closest integer divider */
|
|
|
+ a = DIV_ROUND_CLOSEST(*parent_rate, rate);
|
|
|
+ if (a < SI5351_MULTISYNTH_A_MIN)
|
|
|
+ a = SI5351_MULTISYNTH_A_MIN;
|
|
|
+ if (a > SI5351_MULTISYNTH67_A_MAX)
|
|
|
+ a = SI5351_MULTISYNTH67_A_MAX;
|
|
|
+
|
|
|
+ b = 0;
|
|
|
+ c = 1;
|
|
|
} else {
|
|
|
unsigned long rfrac, denom;
|
|
|
|
|
@@ -692,9 +703,7 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate,
|
|
|
a = *parent_rate / rate;
|
|
|
if (a < SI5351_MULTISYNTH_A_MIN)
|
|
|
a = SI5351_MULTISYNTH_A_MIN;
|
|
|
- if (hwdata->num >= 6 && a > SI5351_MULTISYNTH67_A_MAX)
|
|
|
- a = SI5351_MULTISYNTH67_A_MAX;
|
|
|
- else if (a > SI5351_MULTISYNTH_A_MAX)
|
|
|
+ if (a > SI5351_MULTISYNTH_A_MAX)
|
|
|
a = SI5351_MULTISYNTH_A_MAX;
|
|
|
|
|
|
/* find best approximation for b/c = fVCO mod fOUT */
|
|
@@ -723,6 +732,10 @@ static long si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate,
|
|
|
hwdata->params.p3 = 1;
|
|
|
hwdata->params.p2 = 0;
|
|
|
hwdata->params.p1 = 0;
|
|
|
+ } else if (hwdata->num >= 6) {
|
|
|
+ hwdata->params.p3 = 0;
|
|
|
+ hwdata->params.p2 = 0;
|
|
|
+ hwdata->params.p1 = a;
|
|
|
} else {
|
|
|
hwdata->params.p3 = c;
|
|
|
hwdata->params.p2 = (128 * b) % c;
|