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@@ -320,7 +320,6 @@ static inline void neo_set_no_output_flow_control(struct channel_t *ch)
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/* change UARTs start/stop chars */
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static inline void neo_set_new_start_stop_chars(struct channel_t *ch)
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{
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-
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/* if hardware flow control is set, then skip this whole thing */
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if (ch->ch_digi.digi_flags & (CTSPACE | RTSPACE) || ch->ch_c_cflag & CRTSCTS)
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return;
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@@ -387,7 +386,6 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port)
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/* Here we try to figure out what caused the interrupt to happen */
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while (1) {
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-
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isr = readb(&ch->ch_neo_uart->isr_fcr);
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/* Bail if no pending interrupt */
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@@ -626,7 +624,6 @@ static void neo_param(struct tty_struct *tty)
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return;
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} else if (ch->ch_custom_speed) {
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-
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baud = ch->ch_custom_speed;
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/* Handle transition from B0 */
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if (ch->ch_flags & CH_BAUD0) {
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@@ -954,7 +951,6 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
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/* Loop on each port */
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while ((uart_poll & 0xff) != 0) {
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-
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tmp = uart_poll;
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/* Check current port to see if it has interrupt pending */
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@@ -977,7 +973,6 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
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/* Switch on type of interrupt we have */
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switch (type) {
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-
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case UART_17158_RXRDY_TIMEOUT:
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/*
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* RXRDY Time-out is cleared by reading data in the
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@@ -1141,7 +1136,6 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch)
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total = min(total, qleft);
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while (total > 0) {
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-
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/*
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* Grab the linestatus register, we need to check
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* to see if there are any errors in the FIFO.
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@@ -1206,7 +1200,6 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch)
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* Also deal with any possible queue overflow here as well.
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*/
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while (1) {
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-
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/*
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* Its possible we have a linestatus from the loop above
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* this, so we "OR" on any extra bits.
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@@ -1339,7 +1332,6 @@ static void neo_flush_uart_write(struct channel_t *ch)
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neo_pci_posting_flush(ch->ch_bd);
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for (i = 0; i < 10; i++) {
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-
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/* Check to see if the UART feels it completely flushed the FIFO. */
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tmp = readb(&ch->ch_neo_uart->isr_fcr);
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if (tmp & 4)
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@@ -1368,7 +1360,6 @@ static void neo_flush_uart_read(struct channel_t *ch)
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neo_pci_posting_flush(ch->ch_bd);
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for (i = 0; i < 10; i++) {
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-
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/* Check to see if the UART feels it completely flushed the FIFO. */
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tmp = readb(&ch->ch_neo_uart->isr_fcr);
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if (tmp & 2)
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@@ -1473,7 +1464,6 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch)
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n = min(n, qlen);
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while (n > 0) {
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-
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s = ((head >= tail) ? head : WQUEUESIZE) - tail;
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s = min(s, n);
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@@ -1632,7 +1622,6 @@ static void neo_send_stop_character(struct channel_t *ch)
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*/
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static void neo_uart_init(struct channel_t *ch)
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{
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-
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writeb(0, &ch->ch_neo_uart->ier);
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writeb(0, &ch->ch_neo_uart->efr);
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writeb(UART_EFR_ECB, &ch->ch_neo_uart->efr);
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