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drm/amd/powerplay: enable set lowest mclk clock on baffin.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu 9 年之前
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2043f43e4b
共有 1 个文件被更改,包括 2 次插入2 次删除
  1. 2 2
      drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

+ 2 - 2
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

@@ -3136,7 +3136,7 @@ static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr)
 							    (1 << level));
 
 	}
-/* uvd is enabled, can't set mclk low right now
+
 	if (!data->mclk_dpm_key_disabled) {
 		if (data->dpm_level_enable_mask.mclk_dpm_enable_mask) {
 			level = phm_get_lowest_enabled_level(hwmgr,
@@ -3146,7 +3146,7 @@ static int polaris10_force_dpm_lowest(struct pp_hwmgr *hwmgr)
 							    (1 << level));
 		}
 	}
-*/
+
 	if (!data->pcie_dpm_key_disabled) {
 		if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) {
 			level = phm_get_lowest_enabled_level(hwmgr,