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@@ -166,6 +166,9 @@ enum {
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CSDP_DST_BURST_16 = 1 << 14,
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CSDP_DST_BURST_16 = 1 << 14,
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CSDP_DST_BURST_32 = 2 << 14,
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CSDP_DST_BURST_32 = 2 << 14,
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CSDP_DST_BURST_64 = 3 << 14,
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CSDP_DST_BURST_64 = 3 << 14,
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+ CSDP_WRITE_NON_POSTED = 0 << 16,
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+ CSDP_WRITE_POSTED = 1 << 16,
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+ CSDP_WRITE_LAST_NON_POSTED = 2 << 16,
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CICR_TOUT_IE = BIT(0), /* OMAP1 only */
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CICR_TOUT_IE = BIT(0), /* OMAP1 only */
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CICR_DROP_IE = BIT(1),
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CICR_DROP_IE = BIT(1),
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@@ -881,15 +884,18 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
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unsigned i, es, en, frame_bytes;
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unsigned i, es, en, frame_bytes;
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bool ll_failed = false;
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bool ll_failed = false;
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u32 burst;
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u32 burst;
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+ u32 port_window, port_window_bytes;
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if (dir == DMA_DEV_TO_MEM) {
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if (dir == DMA_DEV_TO_MEM) {
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dev_addr = c->cfg.src_addr;
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dev_addr = c->cfg.src_addr;
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dev_width = c->cfg.src_addr_width;
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dev_width = c->cfg.src_addr_width;
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burst = c->cfg.src_maxburst;
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burst = c->cfg.src_maxburst;
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+ port_window = c->cfg.src_port_window_size;
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} else if (dir == DMA_MEM_TO_DEV) {
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} else if (dir == DMA_MEM_TO_DEV) {
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dev_addr = c->cfg.dst_addr;
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dev_addr = c->cfg.dst_addr;
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dev_width = c->cfg.dst_addr_width;
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dev_width = c->cfg.dst_addr_width;
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burst = c->cfg.dst_maxburst;
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burst = c->cfg.dst_maxburst;
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+ port_window = c->cfg.dst_port_window_size;
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} else {
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} else {
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dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
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dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
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return NULL;
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return NULL;
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@@ -910,6 +916,12 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
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return NULL;
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return NULL;
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}
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}
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+ /* When the port_window is used, one frame must cover the window */
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+ if (port_window) {
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+ burst = port_window;
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+ port_window_bytes = port_window * es_bytes[es];
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+ }
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+
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/* Now allocate and setup the descriptor. */
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/* Now allocate and setup the descriptor. */
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d = kzalloc(sizeof(*d) + sglen * sizeof(d->sg[0]), GFP_ATOMIC);
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d = kzalloc(sizeof(*d) + sglen * sizeof(d->sg[0]), GFP_ATOMIC);
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if (!d)
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if (!d)
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@@ -921,11 +933,45 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
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d->ccr = c->ccr | CCR_SYNC_FRAME;
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d->ccr = c->ccr | CCR_SYNC_FRAME;
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if (dir == DMA_DEV_TO_MEM) {
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if (dir == DMA_DEV_TO_MEM) {
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- d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
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d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
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d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
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+
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+ d->ccr |= CCR_DST_AMODE_POSTINC;
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+ if (port_window) {
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+ d->ccr |= CCR_SRC_AMODE_DBLIDX;
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+ d->ei = 1;
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+ /*
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+ * One frame covers the port_window and by configure
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+ * the source frame index to be -1 * (port_window - 1)
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+ * we instruct the sDMA that after a frame is processed
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+ * it should move back to the start of the window.
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+ */
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+ d->fi = -(port_window_bytes - 1);
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+
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+ if (port_window_bytes >= 64)
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+ d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
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+ else if (port_window_bytes >= 32)
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+ d->csdp = CSDP_SRC_BURST_32 | CSDP_SRC_PACKED;
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+ else if (port_window_bytes >= 16)
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+ d->csdp = CSDP_SRC_BURST_16 | CSDP_SRC_PACKED;
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+ } else {
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+ d->ccr |= CCR_SRC_AMODE_CONSTANT;
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+ }
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} else {
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} else {
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- d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
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d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
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d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
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+
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+ d->ccr |= CCR_SRC_AMODE_POSTINC;
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+ if (port_window) {
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+ d->ccr |= CCR_DST_AMODE_DBLIDX;
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+
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+ if (port_window_bytes >= 64)
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+ d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
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+ else if (port_window_bytes >= 32)
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+ d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
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+ else if (port_window_bytes >= 16)
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+ d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;
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+ } else {
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+ d->ccr |= CCR_DST_AMODE_CONSTANT;
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+ }
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}
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}
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d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
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d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
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@@ -943,6 +989,9 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
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d->ccr |= CCR_TRIGGER_SRC;
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d->ccr |= CCR_TRIGGER_SRC;
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d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
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d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
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+
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+ if (port_window)
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+ d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
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}
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}
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if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
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if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
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d->clnk_ctrl = c->dma_ch;
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d->clnk_ctrl = c->dma_ch;
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@@ -968,6 +1017,16 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
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osg->addr = sg_dma_address(sgent);
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osg->addr = sg_dma_address(sgent);
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osg->en = en;
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osg->en = en;
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osg->fn = sg_dma_len(sgent) / frame_bytes;
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osg->fn = sg_dma_len(sgent) / frame_bytes;
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+ if (port_window && dir == DMA_MEM_TO_DEV) {
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+ osg->ei = 1;
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+ /*
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+ * One frame covers the port_window and by configure
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+ * the source frame index to be -1 * (port_window - 1)
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+ * we instruct the sDMA that after a frame is processed
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+ * it should move back to the start of the window.
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+ */
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+ osg->fi = -(port_window_bytes - 1);
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+ }
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if (d->using_ll) {
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if (d->using_ll) {
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osg->t2_desc = dma_pool_alloc(od->desc_pool, GFP_ATOMIC,
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osg->t2_desc = dma_pool_alloc(od->desc_pool, GFP_ATOMIC,
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