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@@ -1,228 +0,0 @@
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-/*
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- * linux/arch/arm/plat-mxc/epit.c
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- *
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- * Copyright (C) 2010 Sascha Hauer <s.hauer@pengutronix.de>
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version 2
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- * of the License, or (at your option) any later version.
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, write to the Free Software
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- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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- * MA 02110-1301, USA.
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- */
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-
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-#define EPITCR 0x00
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-#define EPITSR 0x04
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-#define EPITLR 0x08
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-#define EPITCMPR 0x0c
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-#define EPITCNR 0x10
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-
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-#define EPITCR_EN (1 << 0)
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-#define EPITCR_ENMOD (1 << 1)
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-#define EPITCR_OCIEN (1 << 2)
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-#define EPITCR_RLD (1 << 3)
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-#define EPITCR_PRESC(x) (((x) & 0xfff) << 4)
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-#define EPITCR_SWR (1 << 16)
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-#define EPITCR_IOVW (1 << 17)
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-#define EPITCR_DBGEN (1 << 18)
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-#define EPITCR_WAITEN (1 << 19)
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-#define EPITCR_RES (1 << 20)
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-#define EPITCR_STOPEN (1 << 21)
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-#define EPITCR_OM_DISCON (0 << 22)
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-#define EPITCR_OM_TOGGLE (1 << 22)
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-#define EPITCR_OM_CLEAR (2 << 22)
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-#define EPITCR_OM_SET (3 << 22)
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-#define EPITCR_CLKSRC_OFF (0 << 24)
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-#define EPITCR_CLKSRC_PERIPHERAL (1 << 24)
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-#define EPITCR_CLKSRC_REF_HIGH (1 << 24)
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-#define EPITCR_CLKSRC_REF_LOW (3 << 24)
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-
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-#define EPITSR_OCIF (1 << 0)
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-
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-#include <linux/interrupt.h>
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-#include <linux/irq.h>
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-#include <linux/clockchips.h>
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-#include <linux/clk.h>
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-#include <linux/err.h>
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-#include <asm/mach/time.h>
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-
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-#include "common.h"
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-#include "hardware.h"
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-
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-static struct clock_event_device clockevent_epit;
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-
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-static void __iomem *timer_base;
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-
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-static inline void epit_irq_disable(void)
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-{
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- u32 val;
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-
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- val = imx_readl(timer_base + EPITCR);
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- val &= ~EPITCR_OCIEN;
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- imx_writel(val, timer_base + EPITCR);
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-}
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-
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-static inline void epit_irq_enable(void)
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-{
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- u32 val;
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-
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- val = imx_readl(timer_base + EPITCR);
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- val |= EPITCR_OCIEN;
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- imx_writel(val, timer_base + EPITCR);
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-}
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-
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-static void epit_irq_acknowledge(void)
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-{
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- imx_writel(EPITSR_OCIF, timer_base + EPITSR);
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-}
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-
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-static int __init epit_clocksource_init(struct clk *timer_clk)
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-{
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- unsigned int c = clk_get_rate(timer_clk);
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-
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- return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,
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- clocksource_mmio_readl_down);
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-}
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-
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-/* clock event */
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-
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-static int epit_set_next_event(unsigned long evt,
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- struct clock_event_device *unused)
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-{
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- unsigned long tcmp;
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-
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- tcmp = imx_readl(timer_base + EPITCNR);
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-
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- imx_writel(tcmp - evt, timer_base + EPITCMPR);
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-
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- return 0;
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-}
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-
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-/* Left event sources disabled, no more interrupts appear */
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-static int epit_shutdown(struct clock_event_device *evt)
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-{
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- unsigned long flags;
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-
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- /*
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- * The timer interrupt generation is disabled at least
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- * for enough time to call epit_set_next_event()
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- */
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- local_irq_save(flags);
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-
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- /* Disable interrupt in GPT module */
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- epit_irq_disable();
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-
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- /* Clear pending interrupt */
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- epit_irq_acknowledge();
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-
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- local_irq_restore(flags);
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-
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- return 0;
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-}
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-
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-static int epit_set_oneshot(struct clock_event_device *evt)
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-{
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- unsigned long flags;
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-
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- /*
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- * The timer interrupt generation is disabled at least
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- * for enough time to call epit_set_next_event()
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- */
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- local_irq_save(flags);
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-
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- /* Disable interrupt in GPT module */
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- epit_irq_disable();
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-
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- /* Clear pending interrupt, only while switching mode */
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- if (!clockevent_state_oneshot(evt))
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- epit_irq_acknowledge();
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-
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- /*
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- * Do not put overhead of interrupt enable/disable into
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- * epit_set_next_event(), the core has about 4 minutes
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- * to call epit_set_next_event() or shutdown clock after
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- * mode switching
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- */
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- epit_irq_enable();
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- local_irq_restore(flags);
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-
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- return 0;
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-}
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-
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-/*
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- * IRQ handler for the timer
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- */
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-static irqreturn_t epit_timer_interrupt(int irq, void *dev_id)
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-{
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- struct clock_event_device *evt = &clockevent_epit;
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-
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- epit_irq_acknowledge();
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-
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- evt->event_handler(evt);
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-
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- return IRQ_HANDLED;
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-}
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-
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-static struct irqaction epit_timer_irq = {
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- .name = "i.MX EPIT Timer Tick",
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- .flags = IRQF_TIMER | IRQF_IRQPOLL,
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- .handler = epit_timer_interrupt,
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-};
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-
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-static struct clock_event_device clockevent_epit = {
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- .name = "epit",
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- .features = CLOCK_EVT_FEAT_ONESHOT,
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- .set_state_shutdown = epit_shutdown,
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- .tick_resume = epit_shutdown,
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- .set_state_oneshot = epit_set_oneshot,
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- .set_next_event = epit_set_next_event,
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- .rating = 200,
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-};
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-
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-static int __init epit_clockevent_init(struct clk *timer_clk)
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-{
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- clockevent_epit.cpumask = cpumask_of(0);
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- clockevents_config_and_register(&clockevent_epit,
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- clk_get_rate(timer_clk),
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- 0x800, 0xfffffffe);
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-
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- return 0;
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-}
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-
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-void __init epit_timer_init(void __iomem *base, int irq)
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-{
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- struct clk *timer_clk;
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-
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- timer_clk = clk_get_sys("imx-epit.0", NULL);
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- if (IS_ERR(timer_clk)) {
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- pr_err("i.MX epit: unable to get clk\n");
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- return;
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- }
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-
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- clk_prepare_enable(timer_clk);
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-
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- timer_base = base;
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-
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- /*
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- * Initialise to a known state (all timers off, and timing reset)
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- */
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- imx_writel(0x0, timer_base + EPITCR);
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-
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- imx_writel(0xffffffff, timer_base + EPITLR);
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- imx_writel(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
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- timer_base + EPITCR);
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-
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- /* init and register the timer to the framework */
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- epit_clocksource_init(timer_clk);
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- epit_clockevent_init(timer_clk);
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-
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- /* Make irqs happen */
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- setup_irq(irq, &epit_timer_irq);
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-}
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