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@@ -476,6 +476,17 @@ int amdgpu_bo_evict_vram(struct amdgpu_device *adev)
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return ttm_bo_evict_mm(&adev->mman.bdev, TTM_PL_VRAM);
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}
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+static const char *amdgpu_vram_names[] = {
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+ "UNKNOWN",
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+ "GDDR1",
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+ "DDR2",
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+ "GDDR3",
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+ "GDDR4",
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+ "GDDR5",
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+ "HBM",
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+ "DDR3"
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+};
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+
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int amdgpu_bo_init(struct amdgpu_device *adev)
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{
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/* Add an MTRR for the VRAM */
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@@ -484,8 +495,8 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
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DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
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adev->mc.mc_vram_size >> 20,
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(unsigned long long)adev->mc.aper_size >> 20);
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- DRM_INFO("RAM width %dbits DDR\n",
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- adev->mc.vram_width);
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+ DRM_INFO("RAM width %dbits %s\n",
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+ adev->mc.vram_width, amdgpu_vram_names[adev->mc.vram_type]);
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return amdgpu_ttm_init(adev);
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}
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