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drm/i915: Store the HW min frequency as min_freq

this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ben Widawsky 11 anos atrás
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commit
1f05c944e0
2 arquivos alterados com 2 adições e 1 exclusões
  1. 1 0
      drivers/gpu/drm/i915/i915_drv.h
  2. 1 1
      drivers/gpu/drm/i915/intel_pm.c

+ 1 - 0
drivers/gpu/drm/i915/i915_drv.h

@@ -987,6 +987,7 @@ struct intel_gen6_power_mgmt {
 	u8 rp1_delay;
 	u8 rp0_delay;
 	u8 hw_max;
+	u8 min_freq;
 
 	bool rp_up_masked;
 	bool rp_down_masked;

+ 1 - 1
drivers/gpu/drm/i915/intel_pm.c

@@ -3354,7 +3354,7 @@ static void gen6_enable_rps(struct drm_device *dev)
 
 	/* In units of 50MHz */
 	dev_priv->rps.hw_max = hw_max = rp_state_cap & 0xff;
-	hw_min = (rp_state_cap >> 16) & 0xff;
+	dev_priv->rps.min_freq = hw_min = (rp_state_cap >> 16) & 0xff;
 	dev_priv->rps.rp1_delay = (rp_state_cap >>  8) & 0xff;
 	dev_priv->rps.rp0_delay = (rp_state_cap >>  0) & 0xff;
 	dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay;