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@@ -475,7 +475,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
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* sequentiality; this is because not all clear_pending_set_locked()
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* implementations imply full barriers.
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*/
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- smp_cond_acquire(!(atomic_read(&lock->val) & _Q_LOCKED_MASK));
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+ smp_cond_load_acquire(&lock->val.counter, !(VAL & _Q_LOCKED_MASK));
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/*
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* take ownership and clear the pending bit.
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@@ -562,7 +562,7 @@ queue:
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*
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* The PV pv_wait_head_or_lock function, if active, will acquire
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* the lock and return a non-zero value. So we have to skip the
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- * smp_cond_acquire() call. As the next PV queue head hasn't been
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+ * smp_cond_load_acquire() call. As the next PV queue head hasn't been
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* designated yet, there is no way for the locked value to become
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* _Q_SLOW_VAL. So both the set_locked() and the
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* atomic_cmpxchg_relaxed() calls will be safe.
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@@ -573,7 +573,7 @@ queue:
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if ((val = pv_wait_head_or_lock(lock, node)))
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goto locked;
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- smp_cond_acquire(!((val = atomic_read(&lock->val)) & _Q_LOCKED_PENDING_MASK));
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+ val = smp_cond_load_acquire(&lock->val.counter, !(VAL & _Q_LOCKED_PENDING_MASK));
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locked:
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/*
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@@ -593,9 +593,9 @@ locked:
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break;
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}
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/*
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- * The smp_cond_acquire() call above has provided the necessary
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- * acquire semantics required for locking. At most two
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- * iterations of this loop may be ran.
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+ * The smp_cond_load_acquire() call above has provided the
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+ * necessary acquire semantics required for locking. At most
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+ * two iterations of this loop may be ran.
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*/
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old = atomic_cmpxchg_relaxed(&lock->val, val, _Q_LOCKED_VAL);
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if (old == val)
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