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@@ -51,6 +51,8 @@ struct rockchip_pwm_data {
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void (*set_enable)(struct pwm_chip *chip,
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struct pwm_device *pwm, bool enable);
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+ void (*get_state)(struct pwm_chip *chip, struct pwm_device *pwm,
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+ struct pwm_state *state);
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};
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static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c)
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@@ -75,6 +77,19 @@ static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,
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writel_relaxed(val, pc->base + pc->data->regs.ctrl);
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}
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+static void rockchip_pwm_get_state_v1(struct pwm_chip *chip,
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+ struct pwm_device *pwm,
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+ struct pwm_state *state)
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+{
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+ struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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+ u32 enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN;
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+ u32 val;
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+
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+ val = readl_relaxed(pc->base + pc->data->regs.ctrl);
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+ if ((val & enable_conf) == enable_conf)
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+ state->enabled = true;
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+}
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+
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static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
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struct pwm_device *pwm, bool enable)
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{
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@@ -98,6 +113,53 @@ static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
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writel_relaxed(val, pc->base + pc->data->regs.ctrl);
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}
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+static void rockchip_pwm_get_state_v2(struct pwm_chip *chip,
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+ struct pwm_device *pwm,
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+ struct pwm_state *state)
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+{
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+ struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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+ u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE |
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+ PWM_CONTINUOUS;
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+ u32 val;
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+
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+ val = readl_relaxed(pc->base + pc->data->regs.ctrl);
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+ if ((val & enable_conf) != enable_conf)
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+ return;
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+
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+ state->enabled = true;
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+
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+ if (!(val & PWM_DUTY_POSITIVE))
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+ state->polarity = PWM_POLARITY_INVERSED;
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+}
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+
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+static void rockchip_pwm_get_state(struct pwm_chip *chip,
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+ struct pwm_device *pwm,
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+ struct pwm_state *state)
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+{
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+ struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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+ unsigned long clk_rate;
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+ u64 tmp;
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+ int ret;
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+
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+ ret = clk_enable(pc->clk);
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+ if (ret)
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+ return;
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+
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+ clk_rate = clk_get_rate(pc->clk);
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+
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+ tmp = readl_relaxed(pc->base + pc->data->regs.period);
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+ tmp *= pc->data->prescaler * NSEC_PER_SEC;
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+ state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
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+
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+ tmp = readl_relaxed(pc->base + pc->data->regs.duty);
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+ tmp *= pc->data->prescaler * NSEC_PER_SEC;
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+ state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
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+
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+ pc->data->get_state(chip, pwm, state);
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+
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+ clk_disable(pc->clk);
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+}
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+
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static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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@@ -170,6 +232,7 @@ static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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}
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static const struct pwm_ops rockchip_pwm_ops_v1 = {
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+ .get_state = rockchip_pwm_get_state,
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.config = rockchip_pwm_config,
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.enable = rockchip_pwm_enable,
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.disable = rockchip_pwm_disable,
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@@ -177,6 +240,7 @@ static const struct pwm_ops rockchip_pwm_ops_v1 = {
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};
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static const struct pwm_ops rockchip_pwm_ops_v2 = {
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+ .get_state = rockchip_pwm_get_state,
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.config = rockchip_pwm_config,
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.set_polarity = rockchip_pwm_set_polarity,
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.enable = rockchip_pwm_enable,
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@@ -194,6 +258,7 @@ static const struct rockchip_pwm_data pwm_data_v1 = {
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.prescaler = 2,
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.ops = &rockchip_pwm_ops_v1,
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.set_enable = rockchip_pwm_set_enable_v1,
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+ .get_state = rockchip_pwm_get_state_v1,
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};
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static const struct rockchip_pwm_data pwm_data_v2 = {
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@@ -206,6 +271,7 @@ static const struct rockchip_pwm_data pwm_data_v2 = {
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.prescaler = 1,
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.ops = &rockchip_pwm_ops_v2,
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.set_enable = rockchip_pwm_set_enable_v2,
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+ .get_state = rockchip_pwm_get_state_v2,
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};
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static const struct rockchip_pwm_data pwm_data_vop = {
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@@ -218,6 +284,7 @@ static const struct rockchip_pwm_data pwm_data_vop = {
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.prescaler = 1,
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.ops = &rockchip_pwm_ops_v2,
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.set_enable = rockchip_pwm_set_enable_v2,
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+ .get_state = rockchip_pwm_get_state_v2,
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};
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static const struct of_device_id rockchip_pwm_dt_ids[] = {
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