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@@ -277,6 +277,7 @@ void __init ralink_clk_init(void)
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ralink_clk_add("10000500.uart", periph_rate);
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ralink_clk_add("10000b00.spi", sys_rate);
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ralink_clk_add("10000c00.uartlite", periph_rate);
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+ ralink_clk_add("10180000.wmac", xtal_rate);
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}
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void __init ralink_of_remap(void)
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@@ -298,22 +299,27 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
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u32 cfg0;
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u32 pmu0;
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u32 pmu1;
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+ u32 bga;
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n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
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n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
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+ rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
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+ bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
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- if (n0 == MT7620N_CHIP_NAME0 && n1 == MT7620N_CHIP_NAME1) {
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- name = "MT7620N";
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- soc_info->compatible = "ralink,mt7620n-soc";
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- } else if (n0 == MT7620A_CHIP_NAME0 && n1 == MT7620A_CHIP_NAME1) {
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+ if (n0 != MT7620_CHIP_NAME0 || n1 != MT7620_CHIP_NAME1)
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+ panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
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+
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+ if (bga) {
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name = "MT7620A";
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soc_info->compatible = "ralink,mt7620a-soc";
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} else {
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- panic("mt7620: unknown SoC, n0:%08x n1:%08x", n0, n1);
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+ name = "MT7620N";
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+ soc_info->compatible = "ralink,mt7620n-soc";
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+#ifdef CONFIG_PCI
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+ panic("mt7620n is only supported for non pci kernels");
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+#endif
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}
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- rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
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-
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snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
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"Ralink %s ver:%u eco:%u",
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name,
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