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@@ -68,8 +68,9 @@ static void coda_command_async(struct coda_ctx *ctx, int cmd)
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{
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struct coda_dev *dev = ctx->dev;
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- if (dev->devtype->product == CODA_960 ||
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- dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541 ||
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+ dev->devtype->product == CODA_960) {
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/* Restore context related registers to CODA */
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coda_write(dev, ctx->bit_stream_param,
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CODA_REG_BIT_BIT_STREAM_PARAM);
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@@ -506,7 +507,8 @@ static int coda_alloc_context_buffers(struct coda_ctx *ctx,
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goto err;
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}
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- if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
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+ if (!ctx->psbuf.vaddr && (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541)) {
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ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
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CODA7_PS_BUF_SIZE, "psbuf");
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if (ret < 0)
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@@ -594,6 +596,7 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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int dbk_bits;
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int bit_bits;
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int ip_bits;
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+ int me_bits;
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memset(iram_info, 0, sizeof(*iram_info));
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iram_info->next_paddr = dev->iram.paddr;
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@@ -603,15 +606,23 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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return;
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switch (dev->devtype->product) {
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+ case CODA_HX4:
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+ dbk_bits = CODA7_USE_HOST_DBK_ENABLE;
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+ bit_bits = CODA7_USE_HOST_BIT_ENABLE;
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+ ip_bits = CODA7_USE_HOST_IP_ENABLE;
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+ me_bits = CODA7_USE_HOST_ME_ENABLE;
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+ break;
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case CODA_7541:
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dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
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bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
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ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
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+ me_bits = CODA7_USE_HOST_ME_ENABLE | CODA7_USE_ME_ENABLE;
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break;
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case CODA_960:
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dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
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bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
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ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
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+ me_bits = 0;
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break;
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default: /* CODA_DX6 */
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return;
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@@ -626,7 +637,8 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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w64 = mb_width * 64;
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/* Prioritize in case IRAM is too small for everything */
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- if (dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541) {
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iram_info->search_ram_size = round_up(mb_width * 16 *
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36 + 2048, 1024);
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iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
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@@ -635,8 +647,7 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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pr_err("IRAM is smaller than the search ram size\n");
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goto out;
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}
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- iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
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- CODA7_USE_ME_ENABLE;
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+ iram_info->axi_sram_use |= me_bits;
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}
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/* Only H.264BP and H.263P3 are considered */
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@@ -688,7 +699,8 @@ out:
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v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
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"IRAM smaller than needed\n");
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- if (dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541) {
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/* TODO - Enabling these causes picture errors on CODA7541 */
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if (ctx->inst_type == CODA_INST_DECODER) {
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/* fw 1.4.50 */
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@@ -706,6 +718,7 @@ out:
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static u32 coda_supported_firmwares[] = {
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CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
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+ CODA_FIRMWARE_VERNUM(CODA_HX4, 1, 4, 50),
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CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
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CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
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CODA_FIRMWARE_VERNUM(CODA_960, 2, 3, 10),
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@@ -890,6 +903,7 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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case CODA_960:
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coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
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/* fallthrough */
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+ case CODA_HX4:
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case CODA_7541:
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coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
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CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
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@@ -919,6 +933,7 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
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<< CODA_PICHEIGHT_OFFSET;
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break;
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+ case CODA_HX4:
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case CODA_7541:
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if (dst_fourcc == V4L2_PIX_FMT_H264) {
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value = (round_up(q_data_src->width, 16) &
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@@ -1086,6 +1101,7 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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value = FMO_SLICE_SAVE_BUF_SIZE << 7;
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coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
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break;
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+ case CODA_HX4:
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case CODA_7541:
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coda_write(dev, ctx->iram_info.search_ram_paddr,
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CODA7_CMD_ENC_SEQ_SEARCH_BASE);
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@@ -1131,7 +1147,8 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
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coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
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- if (dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541) {
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coda_write(dev, q_data_src->bytesperline,
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CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
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}
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@@ -1570,7 +1587,8 @@ static bool coda_reorder_enable(struct coda_ctx *ctx)
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struct coda_dev *dev = ctx->dev;
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int profile, level;
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- if (dev->devtype->product != CODA_7541 &&
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+ if (dev->devtype->product != CODA_HX4 &&
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+ dev->devtype->product != CODA_7541 &&
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dev->devtype->product != CODA_960)
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return false;
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@@ -1664,7 +1682,8 @@ static int __coda_start_decoding(struct coda_ctx *ctx)
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CODA_CMD_DEC_SEQ_MP4_ASP_CLASS);
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}
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if (src_fourcc == V4L2_PIX_FMT_H264) {
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- if (dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541) {
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coda_write(dev, ctx->psbuf.paddr,
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CODA_CMD_DEC_SEQ_PS_BB_START);
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coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
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@@ -1791,7 +1810,8 @@ static int __coda_start_decoding(struct coda_ctx *ctx)
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CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
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}
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- if (dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541) {
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int max_mb_x = 1920 / 16;
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int max_mb_y = 1088 / 16;
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int max_mb_num = max_mb_x * max_mb_y;
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@@ -1909,6 +1929,7 @@ static int coda_prepare_decode(struct coda_ctx *ctx)
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switch (dev->devtype->product) {
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case CODA_DX6:
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/* TBD */
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+ case CODA_HX4:
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case CODA_7541:
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coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
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break;
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@@ -2049,7 +2070,8 @@ static void coda_finish_decode(struct coda_ctx *ctx)
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v4l2_err(&dev->v4l2_dev,
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"errors in %d macroblocks\n", err_mb);
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- if (dev->devtype->product == CODA_7541) {
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+ if (dev->devtype->product == CODA_HX4 ||
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+ dev->devtype->product == CODA_7541) {
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val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
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if (val == 0) {
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/* not enough bitstream data */
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