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@@ -493,6 +493,13 @@
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/* Maximum number of TXQs used by single port */
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#define MVPP2_MAX_TXQ 8
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+/* MVPP2_MAX_TSO_SEGS is the maximum number of fragments to allow in the GSO
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+ * skb. As we need a maxium of two descriptors per fragments (1 header, 1 data),
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+ * multiply this value by two to count the maximum number of skb descs needed.
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+ */
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+#define MVPP2_MAX_TSO_SEGS 300
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+#define MVPP2_MAX_SKB_DESCS (MVPP2_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
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+
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/* Dfault number of RXQs in use */
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#define MVPP2_DEFAULT_RXQ 4
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@@ -1045,6 +1052,9 @@ struct mvpp2_txq_pcpu {
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*/
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int count;
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+ int wake_threshold;
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+ int stop_threshold;
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+
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/* Number of Tx DMA descriptors reserved for each CPU */
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int reserved_num;
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@@ -5393,7 +5403,7 @@ static void mvpp2_txq_done(struct mvpp2_port *port, struct mvpp2_tx_queue *txq,
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txq_pcpu->count -= tx_done;
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if (netif_tx_queue_stopped(nq))
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- if (txq_pcpu->size - txq_pcpu->count >= MAX_SKB_FRAGS + 1)
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+ if (txq_pcpu->count <= txq_pcpu->wake_threshold)
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netif_tx_wake_queue(nq);
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}
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@@ -5636,6 +5646,9 @@ static int mvpp2_txq_init(struct mvpp2_port *port,
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txq_pcpu->txq_put_index = 0;
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txq_pcpu->txq_get_index = 0;
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+ txq_pcpu->stop_threshold = txq->size - MVPP2_MAX_SKB_DESCS;
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+ txq_pcpu->wake_threshold = txq_pcpu->stop_threshold / 2;
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+
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txq_pcpu->tso_headers =
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dma_alloc_coherent(port->dev->dev.parent,
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txq_pcpu->size * TSO_HEADER_SIZE,
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@@ -6508,7 +6521,7 @@ out:
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wmb();
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mvpp2_aggr_txq_pend_desc_add(port, frags);
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- if (txq_pcpu->size - txq_pcpu->count < MAX_SKB_FRAGS + 1)
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+ if (txq_pcpu->count >= txq_pcpu->stop_threshold)
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netif_tx_stop_queue(nq);
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u64_stats_update_begin(&stats->syncp);
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@@ -7732,6 +7745,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
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dev->features = features | NETIF_F_RXCSUM;
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dev->hw_features |= features | NETIF_F_RXCSUM | NETIF_F_GRO;
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dev->vlan_features |= features;
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+ dev->gso_max_segs = MVPP2_MAX_TSO_SEGS;
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/* MTU range: 68 - 9676 */
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dev->min_mtu = ETH_MIN_MTU;
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