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@@ -300,31 +300,29 @@ static void execlists_elsp_write(struct drm_i915_gem_request *rq0,
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struct intel_engine_cs *ring = rq0->ring;
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struct drm_device *dev = ring->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- uint64_t temp = 0;
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- uint32_t desc[4];
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+ uint64_t desc[2];
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- /* XXX: You must always write both descriptors in the order below. */
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- if (rq1)
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- temp = execlists_ctx_descriptor(rq1);
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- else
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- temp = 0;
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- desc[1] = (u32)(temp >> 32);
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- desc[0] = (u32)temp;
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+ if (rq1) {
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+ desc[1] = execlists_ctx_descriptor(rq1);
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+ rq1->elsp_submitted++;
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+ } else {
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+ desc[1] = 0;
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+ }
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- temp = execlists_ctx_descriptor(rq0);
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- desc[3] = (u32)(temp >> 32);
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- desc[2] = (u32)temp;
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+ desc[0] = execlists_ctx_descriptor(rq0);
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+ rq0->elsp_submitted++;
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+ /* You must always write both descriptors in the order below. */
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spin_lock(&dev_priv->uncore.lock);
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intel_uncore_forcewake_get__locked(dev_priv, FORCEWAKE_ALL);
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- I915_WRITE_FW(RING_ELSP(ring), desc[1]);
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- I915_WRITE_FW(RING_ELSP(ring), desc[0]);
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- I915_WRITE_FW(RING_ELSP(ring), desc[3]);
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+ I915_WRITE_FW(RING_ELSP(ring), upper_32_bits(desc[1]));
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+ I915_WRITE_FW(RING_ELSP(ring), lower_32_bits(desc[1]));
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+ I915_WRITE_FW(RING_ELSP(ring), upper_32_bits(desc[0]));
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/* The context is automatically loaded after the following */
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- I915_WRITE_FW(RING_ELSP(ring), desc[2]);
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+ I915_WRITE_FW(RING_ELSP(ring), lower_32_bits(desc[0]));
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- /* ELSP is a wo register, so use another nearby reg for posting instead */
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+ /* ELSP is a wo register, use another nearby reg for posting */
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POSTING_READ_FW(RING_EXECLIST_STATUS(ring));
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intel_uncore_forcewake_put__locked(dev_priv, FORCEWAKE_ALL);
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spin_unlock(&dev_priv->uncore.lock);
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@@ -433,10 +431,6 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring)
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WARN_ON(req1 && req1->elsp_submitted);
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execlists_submit_requests(req0, req1);
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-
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- req0->elsp_submitted++;
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- if (req1)
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- req1->elsp_submitted++;
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}
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static bool execlists_check_remove_request(struct intel_engine_cs *ring,
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