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@@ -20,9 +20,11 @@ upon its completion.
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The second method is to omit the command,
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and turbostat displays statistics every 5 seconds.
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The 5-second interval can be changed using the --interval option.
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-
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+.PP
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Some information is not available on older processors.
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.SS Options
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+Options can be specified with a single or double '-', and only as much of the option
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+name as necessary to disambiguate it from others is necessary. Note that options are case-sensitive.
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\fB--Counter MSR#\fP shows the delta of the specified 64-bit MSR counter.
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.PP
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\fB--counter MSR#\fP shows the delta of the specified 32-bit MSR counter.
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@@ -55,16 +57,20 @@ more than once may also enable internal turbostat debug information.
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The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit,
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displays the statistics gathered since it was forked.
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.PP
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-.SH FIELD DESCRIPTIONS
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+.SH DEFAULT FIELD DESCRIPTIONS
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.nf
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-\fBPackage\fP processor package number.
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-\fBCore\fP processor core number.
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-\fBCPU\fP Linux CPU (logical processor) number.
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-Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
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+\fBCPU\fP Linux CPU (logical processor) number. Yes, it is okay that on many systems the CPUs are not listed in numerical order -- for efficiency reasons, turbostat runs in topology order, so HT siblings appear together.
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\fBAVG_MHz\fP number of cycles executed divided by time elapsed.
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\fB%Busy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
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\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
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\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
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+.fi
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+.PP
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+.SH DEBUG FIELD DESCRIPTIONS
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+.nf
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+\fBPackage\fP processor package number.
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+\fBCore\fP processor core number.
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+Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology (HT).
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\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
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\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
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\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
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@@ -81,63 +87,76 @@ Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading T
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Without any parameters, turbostat displays statistics ever 5 seconds.
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(override interval with "-i sec" option, or specify a command
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for turbostat to fork).
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+.nf
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+[root@hsw]# ./turbostat
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+ CPU Avg_MHz %Busy Bzy_MHz TSC_MHz
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+ - 488 12.51 3898 3498
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+ 0 0 0.01 3885 3498
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+ 4 3897 99.99 3898 3498
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+ 1 0 0.00 3861 3498
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+ 5 0 0.00 3882 3498
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+ 2 1 0.02 3894 3498
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+ 6 2 0.06 3898 3498
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+ 3 0 0.00 3849 3498
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+ 7 0 0.00 3877 3498
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+
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+.fi
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+.SH DEBUG EXAMPLE
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+The "--debug" option prints additional system information before measurements:
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The first row of statistics is a summary for the entire system.
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For residency % columns, the summary is a weighted average.
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For Temperature columns, the summary is the column maximum.
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For Watts columns, the summary is a system total.
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Subsequent rows show per-CPU statistics.
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-
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-.nf
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-[root@ivy]# ./turbostat
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- Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
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- - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
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- 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
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- 0 4 1 0.07 1596 3492 0 0.79
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- 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23
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- 1 5 5 0.28 1596 3492 0 0.95
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- 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23
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- 2 6 2 0.10 1597 3492 0 0.97
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- 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23
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- 3 7 5 0.31 1596 3492 0 0.33
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-.fi
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-.SH DEBUG EXAMPLE
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-The "--debug" option prints additional system information before measurements:
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-
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.nf
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-turbostat version 4.0 10-Feb, 2015 - Len Brown <lenb@kernel.org>
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-CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9)
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+turbostat version 4.1 10-Feb, 2015 - Len Brown <lenb@kernel.org>
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+CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3c:3 (6:60:3)
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CPUID(6): APERF, DTS, PTM, EPB
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-RAPL: 851 sec. Joule Counter Range, at 77 Watts
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-cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300
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-16 * 100 = 1600 MHz max efficiency
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+RAPL: 3121 sec. Joule Counter Range, at 84 Watts
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+cpu0: MSR_NHM_PLATFORM_INFO: 0x80838f3012300
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+8 * 100 = 800 MHz max efficiency
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35 * 100 = 3500 MHz TSC frequency
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-cpu0: MSR_IA32_POWER_CTL: 0x0014005d (C1E auto-promotion: DISabled)
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-cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6n)
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+cpu0: MSR_IA32_POWER_CTL: 0x0004005d (C1E auto-promotion: DISabled)
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+cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e000400 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, UNlocked: pkg-cstate-limit=0: pc0)
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cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
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37 * 100 = 3700 MHz max turbo 4 active cores
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38 * 100 = 3800 MHz max turbo 3 active cores
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39 * 100 = 3900 MHz max turbo 2 active cores
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39 * 100 = 3900 MHz max turbo 1 active cores
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cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
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-cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.)
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-cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.)
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-cpu0: MSR_PKG_POWER_LIMIT: 0x30000148268 (UNlocked)
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-cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled)
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-cpu0: PKG Limit #2: DISabled (96.000000 Watts, 0.000977* sec, clamp DISabled)
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+cpu0: MSR_CORE_PERF_LIMIT_REASONS, 0x31200000 (Active: ) (Logged: Auto-HWP, Amps, MultiCoreTurbo, Transitions, )
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+cpu0: MSR_GFX_PERF_LIMIT_REASONS, 0x00000000 (Active: ) (Logged: )
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+cpu0: MSR_RING_PERF_LIMIT_REASONS, 0x0d000000 (Active: ) (Logged: Amps, PkgPwrL1, PkgPwrL2, )
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+cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.)
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+cpu0: MSR_PKG_POWER_INFO: 0x000002a0 (84 W TDP, RAPL 0 - 0 W, 0.000000 sec.)
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+cpu0: MSR_PKG_POWER_LIMIT: 0x428348001a82a0 (UNlocked)
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+cpu0: PKG Limit #1: ENabled (84.000000 Watts, 8.000000 sec, clamp DISabled)
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+cpu0: PKG Limit #2: ENabled (105.000000 Watts, 0.002441* sec, clamp DISabled)
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cpu0: MSR_PP0_POLICY: 0
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cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
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cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
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cpu0: MSR_PP1_POLICY: 0
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cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
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cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
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-cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C)
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-cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C)
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-cpu0: MSR_IA32_THERM_STATUS: 0x88580000 (17 C +/- 1)
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-cpu1: MSR_IA32_THERM_STATUS: 0x885a0000 (15 C +/- 1)
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-cpu2: MSR_IA32_THERM_STATUS: 0x88570000 (18 C +/- 1)
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-cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1)
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- ...
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+cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00641400 (100 C)
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+cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x88340800 (48 C)
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+cpu0: MSR_IA32_THERM_STATUS: 0x88340000 (48 C +/- 1)
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+cpu1: MSR_IA32_THERM_STATUS: 0x88440000 (32 C +/- 1)
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+cpu2: MSR_IA32_THERM_STATUS: 0x88450000 (31 C +/- 1)
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+cpu3: MSR_IA32_THERM_STATUS: 0x88490000 (27 C +/- 1)
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+ Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp PkgWatt CorWatt GFXWatt
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+ - - 493 12.64 3898 3498 0 12.64 0.00 0.00 74.72 47 47 21.62 13.74 0.00
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+ 0 0 4 0.11 3894 3498 0 99.89 0.00 0.00 0.00 47 47 21.62 13.74 0.00
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+ 0 4 3897 99.98 3898 3498 0 0.02
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+ 1 1 7 0.17 3887 3498 0 0.04 0.00 0.00 99.79 32
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+ 1 5 0 0.00 3885 3498 0 0.21
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+ 2 2 29 0.76 3895 3498 0 0.10 0.01 0.01 99.13 32
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+ 2 6 2 0.06 3896 3498 0 0.80
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+ 3 3 1 0.02 3832 3498 0 0.03 0.00 0.00 99.95 28
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+ 3 7 0 0.00 3879 3498 0 0.04
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+^C
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+
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.fi
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The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
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available at the minimum package voltage. The \fBTSC frequency\fP is the base
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@@ -147,6 +166,9 @@ should be sustainable on all CPUs indefinitely, given nominal power and cooling.
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The remaining rows show what maximum turbo frequency is possible
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depending on the number of idle cores. Note that not all information is
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available on all processors.
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+.PP
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+The --debug option adds additional columns to the measurement ouput, including CPU idle power-state residency processor temperature sensor readinds.
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+See the field definitions above.
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.SH FORK EXAMPLE
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If turbostat is invoked with a command, it will fork that command
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and output the statistics gathered when the command exits.
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@@ -154,27 +176,23 @@ eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
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until ^C while the other CPUs are mostly idle:
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.nf
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-root@ivy: turbostat cat /dev/zero > /dev/null
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+root@hsw: turbostat cat /dev/zero > /dev/null
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^C
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- Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
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- - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
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- 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
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- 0 4 9 0.24 3829 3492 0 1.15
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- 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36
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- 1 5 3880 99.82 3888 3492 0 0.18
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- 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28
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- 2 6 12 0.32 3823 3492 0 0.89
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- 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30
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- 3 7 4 0.11 3827 3492 0 0.94
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-30.372243 sec
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+ CPU Avg_MHz %Busy Bzy_MHz TSC_MHz
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+ - 482 12.51 3854 3498
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+ 0 0 0.01 1960 3498
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+ 4 0 0.00 2128 3498
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+ 1 0 0.00 3003 3498
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+ 5 3854 99.98 3855 3498
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+ 2 0 0.01 3504 3498
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+ 6 3 0.08 3884 3498
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+ 3 0 0.00 2553 3498
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+ 7 0 0.00 2126 3498
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+10.783983 sec
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.fi
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-Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit
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-while the other processors are generally in various states of idle.
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-
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-Note that cpu1 and cpu5 are HT siblings within core1.
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-As cpu5 is very busy, it prevents its sibling, cpu1,
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-from entering a c-state deeper than c1.
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+Above the cycle soaker drives cpu5 up its 3.9 GHz turbo limit.
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+The first row shows the average MHz and %Busy across all the processors in the system.
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Note that the Avg_MHz column reflects the total number of cycles executed
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divided by the measurement interval. If the %Busy column is 100%,
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