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@@ -67,6 +67,9 @@
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#define BMC150_ACCEL_REG_PMU_BW 0x10
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#define BMC150_ACCEL_DEF_BW 125
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+#define BMC150_ACCEL_REG_RESET 0x14
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+#define BMC150_ACCEL_RESET_VAL 0xB6
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+
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#define BMC150_ACCEL_REG_INT_MAP_0 0x19
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#define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2)
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@@ -1497,6 +1500,14 @@ static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
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int ret, i;
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unsigned int val;
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+ /*
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+ * Reset chip to get it in a known good state. A delay of 1.8ms after
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+ * reset is required according to the data sheets of supported chips.
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+ */
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+ regmap_write(data->regmap, BMC150_ACCEL_REG_RESET,
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+ BMC150_ACCEL_RESET_VAL);
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+ usleep_range(1800, 2500);
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+
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ret = regmap_read(data->regmap, BMC150_ACCEL_REG_CHIP_ID, &val);
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if (ret < 0) {
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dev_err(dev, "Error: Reading chip id\n");
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