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@@ -18,6 +18,8 @@
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/regmap.h>
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#include <linux/sched.h>
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#include <linux/wait.h>
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@@ -34,7 +36,7 @@
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struct clk_main_osc {
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struct clk_hw hw;
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- struct at91_pmc *pmc;
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+ struct regmap *regmap;
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unsigned int irq;
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wait_queue_head_t wait;
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};
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@@ -43,7 +45,7 @@ struct clk_main_osc {
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struct clk_main_rc_osc {
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struct clk_hw hw;
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- struct at91_pmc *pmc;
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+ struct regmap *regmap;
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unsigned int irq;
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wait_queue_head_t wait;
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unsigned long frequency;
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@@ -54,14 +56,14 @@ struct clk_main_rc_osc {
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struct clk_rm9200_main {
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struct clk_hw hw;
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- struct at91_pmc *pmc;
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+ struct regmap *regmap;
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};
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#define to_clk_rm9200_main(hw) container_of(hw, struct clk_rm9200_main, hw)
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struct clk_sam9x5_main {
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struct clk_hw hw;
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- struct at91_pmc *pmc;
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+ struct regmap *regmap;
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unsigned int irq;
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wait_queue_head_t wait;
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u8 parent;
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@@ -79,25 +81,36 @@ static irqreturn_t clk_main_osc_irq_handler(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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+static inline bool clk_main_osc_ready(struct regmap *regmap)
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+{
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+ unsigned int status;
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+
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+ regmap_read(regmap, AT91_PMC_SR, &status);
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+
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+ return status & AT91_PMC_MOSCS;
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+}
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+
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static int clk_main_osc_prepare(struct clk_hw *hw)
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{
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struct clk_main_osc *osc = to_clk_main_osc(hw);
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- struct at91_pmc *pmc = osc->pmc;
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+ struct regmap *regmap = osc->regmap;
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u32 tmp;
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- tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK;
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+ regmap_read(regmap, AT91_CKGR_MOR, &tmp);
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+ tmp &= ~MOR_KEY_MASK;
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+
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if (tmp & AT91_PMC_OSCBYPASS)
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return 0;
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if (!(tmp & AT91_PMC_MOSCEN)) {
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tmp |= AT91_PMC_MOSCEN | AT91_PMC_KEY;
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- pmc_write(pmc, AT91_CKGR_MOR, tmp);
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+ regmap_write(regmap, AT91_CKGR_MOR, tmp);
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}
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- while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) {
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+ while (!clk_main_osc_ready(regmap)) {
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enable_irq(osc->irq);
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wait_event(osc->wait,
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- pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
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+ clk_main_osc_ready(regmap));
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}
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return 0;
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@@ -106,9 +119,10 @@ static int clk_main_osc_prepare(struct clk_hw *hw)
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static void clk_main_osc_unprepare(struct clk_hw *hw)
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{
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struct clk_main_osc *osc = to_clk_main_osc(hw);
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- struct at91_pmc *pmc = osc->pmc;
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- u32 tmp = pmc_read(pmc, AT91_CKGR_MOR);
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+ struct regmap *regmap = osc->regmap;
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+ u32 tmp;
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+ regmap_read(regmap, AT91_CKGR_MOR, &tmp);
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if (tmp & AT91_PMC_OSCBYPASS)
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return;
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@@ -116,20 +130,22 @@ static void clk_main_osc_unprepare(struct clk_hw *hw)
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return;
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tmp &= ~(AT91_PMC_KEY | AT91_PMC_MOSCEN);
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- pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY);
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+ regmap_write(regmap, AT91_CKGR_MOR, tmp | AT91_PMC_KEY);
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}
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static int clk_main_osc_is_prepared(struct clk_hw *hw)
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{
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struct clk_main_osc *osc = to_clk_main_osc(hw);
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- struct at91_pmc *pmc = osc->pmc;
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- u32 tmp = pmc_read(pmc, AT91_CKGR_MOR);
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+ struct regmap *regmap = osc->regmap;
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+ u32 tmp, status;
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+ regmap_read(regmap, AT91_CKGR_MOR, &tmp);
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if (tmp & AT91_PMC_OSCBYPASS)
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return 1;
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- return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS) &&
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- (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN));
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+ regmap_read(regmap, AT91_PMC_SR, &status);
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+
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+ return (status & AT91_PMC_MOSCS) && (tmp & AT91_PMC_MOSCEN);
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}
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static const struct clk_ops main_osc_ops = {
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@@ -139,7 +155,7 @@ static const struct clk_ops main_osc_ops = {
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};
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static struct clk * __init
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-at91_clk_register_main_osc(struct at91_pmc *pmc,
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+at91_clk_register_main_osc(struct regmap *regmap,
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unsigned int irq,
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const char *name,
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const char *parent_name,
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@@ -150,7 +166,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
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struct clk *clk = NULL;
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struct clk_init_data init;
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- if (!pmc || !irq || !name || !parent_name)
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+ if (!irq || !name || !parent_name)
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return ERR_PTR(-EINVAL);
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osc = kzalloc(sizeof(*osc), GFP_KERNEL);
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@@ -164,7 +180,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
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init.flags = CLK_IGNORE_UNUSED;
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osc->hw.init = &init;
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- osc->pmc = pmc;
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+ osc->regmap = regmap;
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osc->irq = irq;
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init_waitqueue_head(&osc->wait);
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@@ -177,10 +193,10 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
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}
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if (bypass)
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- pmc_write(pmc, AT91_CKGR_MOR,
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- (pmc_read(pmc, AT91_CKGR_MOR) &
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- ~(MOR_KEY_MASK | AT91_PMC_MOSCEN)) |
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- AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
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+ regmap_update_bits(regmap,
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+ AT91_CKGR_MOR, MOR_KEY_MASK |
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+ AT91_PMC_MOSCEN,
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+ AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
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clk = clk_register(NULL, &osc->hw);
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if (IS_ERR(clk)) {
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@@ -191,29 +207,35 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
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return clk;
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}
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-void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,
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- struct at91_pmc *pmc)
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+static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
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{
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struct clk *clk;
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unsigned int irq;
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const char *name = np->name;
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const char *parent_name;
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+ struct regmap *regmap;
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bool bypass;
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of_property_read_string(np, "clock-output-names", &name);
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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parent_name = of_clk_get_parent_name(np, 0);
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+ regmap = syscon_node_to_regmap(of_get_parent(np));
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+ if (IS_ERR(regmap))
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+ return;
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+
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irq = irq_of_parse_and_map(np, 0);
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if (!irq)
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return;
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- clk = at91_clk_register_main_osc(pmc, irq, name, parent_name, bypass);
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+ clk = at91_clk_register_main_osc(regmap, irq, name, parent_name, bypass);
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if (IS_ERR(clk))
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return;
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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}
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+CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
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+ of_at91rm9200_clk_main_osc_setup);
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static irqreturn_t clk_main_rc_osc_irq_handler(int irq, void *dev_id)
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{
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@@ -225,23 +247,32 @@ static irqreturn_t clk_main_rc_osc_irq_handler(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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+static bool clk_main_rc_osc_ready(struct regmap *regmap)
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+{
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+ unsigned int status;
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+
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+ regmap_read(regmap, AT91_PMC_SR, &status);
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+
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+ return status & AT91_PMC_MOSCRCS;
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+}
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+
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static int clk_main_rc_osc_prepare(struct clk_hw *hw)
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{
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struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
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- struct at91_pmc *pmc = osc->pmc;
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- u32 tmp;
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+ struct regmap *regmap = osc->regmap;
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+ unsigned int mor;
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- tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK;
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+ regmap_read(regmap, AT91_CKGR_MOR, &mor);
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- if (!(tmp & AT91_PMC_MOSCRCEN)) {
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- tmp |= AT91_PMC_MOSCRCEN | AT91_PMC_KEY;
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- pmc_write(pmc, AT91_CKGR_MOR, tmp);
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- }
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+ if (!(mor & AT91_PMC_MOSCRCEN))
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+ regmap_update_bits(regmap, AT91_CKGR_MOR,
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+ MOR_KEY_MASK | AT91_PMC_MOSCRCEN,
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+ AT91_PMC_MOSCRCEN | AT91_PMC_KEY);
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- while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS)) {
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+ while (!clk_main_rc_osc_ready(regmap)) {
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enable_irq(osc->irq);
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wait_event(osc->wait,
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- pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS);
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+ clk_main_rc_osc_ready(regmap));
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}
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return 0;
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@@ -250,23 +281,28 @@ static int clk_main_rc_osc_prepare(struct clk_hw *hw)
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static void clk_main_rc_osc_unprepare(struct clk_hw *hw)
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{
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struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
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- struct at91_pmc *pmc = osc->pmc;
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- u32 tmp = pmc_read(pmc, AT91_CKGR_MOR);
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+ struct regmap *regmap = osc->regmap;
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+ unsigned int mor;
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- if (!(tmp & AT91_PMC_MOSCRCEN))
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+ regmap_read(regmap, AT91_CKGR_MOR, &mor);
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+
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+ if (!(mor & AT91_PMC_MOSCRCEN))
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return;
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- tmp &= ~(MOR_KEY_MASK | AT91_PMC_MOSCRCEN);
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- pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY);
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+ regmap_update_bits(regmap, AT91_CKGR_MOR,
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+ MOR_KEY_MASK | AT91_PMC_MOSCRCEN, AT91_PMC_KEY);
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}
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static int clk_main_rc_osc_is_prepared(struct clk_hw *hw)
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{
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struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
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- struct at91_pmc *pmc = osc->pmc;
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+ struct regmap *regmap = osc->regmap;
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+ unsigned int mor, status;
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+
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+ regmap_read(regmap, AT91_CKGR_MOR, &mor);
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+ regmap_read(regmap, AT91_PMC_SR, &status);
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- return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS) &&
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- (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCRCEN));
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+ return (mor & AT91_PMC_MOSCRCEN) && (status & AT91_PMC_MOSCRCS);
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}
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static unsigned long clk_main_rc_osc_recalc_rate(struct clk_hw *hw,
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@@ -294,7 +330,7 @@ static const struct clk_ops main_rc_osc_ops = {
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};
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static struct clk * __init
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-at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
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+at91_clk_register_main_rc_osc(struct regmap *regmap,
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unsigned int irq,
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const char *name,
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u32 frequency, u32 accuracy)
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@@ -304,7 +340,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
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struct clk *clk = NULL;
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struct clk_init_data init;
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- if (!pmc || !irq || !name || !frequency)
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+ if (!name || !frequency)
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return ERR_PTR(-EINVAL);
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osc = kzalloc(sizeof(*osc), GFP_KERNEL);
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@@ -318,7 +354,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
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init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
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osc->hw.init = &init;
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- osc->pmc = pmc;
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+ osc->regmap = regmap;
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osc->irq = irq;
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osc->frequency = frequency;
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osc->accuracy = accuracy;
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@@ -339,14 +375,14 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
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return clk;
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}
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-void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
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- struct at91_pmc *pmc)
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+static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np)
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{
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struct clk *clk;
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unsigned int irq;
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u32 frequency = 0;
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u32 accuracy = 0;
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const char *name = np->name;
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+ struct regmap *regmap;
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of_property_read_string(np, "clock-output-names", &name);
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of_property_read_u32(np, "clock-frequency", &frequency);
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@@ -356,25 +392,31 @@ void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
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if (!irq)
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return;
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- clk = at91_clk_register_main_rc_osc(pmc, irq, name, frequency,
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+ regmap = syscon_node_to_regmap(of_get_parent(np));
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+ if (IS_ERR(regmap))
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+ return;
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+
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+ clk = at91_clk_register_main_rc_osc(regmap, irq, name, frequency,
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accuracy);
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if (IS_ERR(clk))
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return;
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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}
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+CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
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+ of_at91sam9x5_clk_main_rc_osc_setup);
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-static int clk_main_probe_frequency(struct at91_pmc *pmc)
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+static int clk_main_probe_frequency(struct regmap *regmap)
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{
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unsigned long prep_time, timeout;
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- u32 tmp;
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+ unsigned int mcfr;
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timeout = jiffies + usecs_to_jiffies(MAINFRDY_TIMEOUT);
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do {
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prep_time = jiffies;
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- tmp = pmc_read(pmc, AT91_CKGR_MCFR);
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- if (tmp & AT91_PMC_MAINRDY)
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+ regmap_read(regmap, AT91_CKGR_MCFR, &mcfr);
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+ if (mcfr & AT91_PMC_MAINRDY)
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return 0;
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usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT);
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} while (time_before(prep_time, timeout));
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@@ -382,34 +424,37 @@ static int clk_main_probe_frequency(struct at91_pmc *pmc)
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return -ETIMEDOUT;
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}
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-static unsigned long clk_main_recalc_rate(struct at91_pmc *pmc,
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+static unsigned long clk_main_recalc_rate(struct regmap *regmap,
|
|
|
unsigned long parent_rate)
|
|
|
{
|
|
|
- u32 tmp;
|
|
|
+ unsigned int mcfr;
|
|
|
|
|
|
if (parent_rate)
|
|
|
return parent_rate;
|
|
|
|
|
|
pr_warn("Main crystal frequency not set, using approximate value\n");
|
|
|
- tmp = pmc_read(pmc, AT91_CKGR_MCFR);
|
|
|
- if (!(tmp & AT91_PMC_MAINRDY))
|
|
|
+ regmap_read(regmap, AT91_CKGR_MCFR, &mcfr);
|
|
|
+ if (!(mcfr & AT91_PMC_MAINRDY))
|
|
|
return 0;
|
|
|
|
|
|
- return ((tmp & AT91_PMC_MAINF) * SLOW_CLOCK_FREQ) / MAINF_DIV;
|
|
|
+ return ((mcfr & AT91_PMC_MAINF) * SLOW_CLOCK_FREQ) / MAINF_DIV;
|
|
|
}
|
|
|
|
|
|
static int clk_rm9200_main_prepare(struct clk_hw *hw)
|
|
|
{
|
|
|
struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw);
|
|
|
|
|
|
- return clk_main_probe_frequency(clkmain->pmc);
|
|
|
+ return clk_main_probe_frequency(clkmain->regmap);
|
|
|
}
|
|
|
|
|
|
static int clk_rm9200_main_is_prepared(struct clk_hw *hw)
|
|
|
{
|
|
|
struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw);
|
|
|
+ unsigned int status;
|
|
|
+
|
|
|
+ regmap_read(clkmain->regmap, AT91_CKGR_MCFR, &status);
|
|
|
|
|
|
- return !!(pmc_read(clkmain->pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINRDY);
|
|
|
+ return status & AT91_PMC_MAINRDY ? 1 : 0;
|
|
|
}
|
|
|
|
|
|
static unsigned long clk_rm9200_main_recalc_rate(struct clk_hw *hw,
|
|
@@ -417,7 +462,7 @@ static unsigned long clk_rm9200_main_recalc_rate(struct clk_hw *hw,
|
|
|
{
|
|
|
struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw);
|
|
|
|
|
|
- return clk_main_recalc_rate(clkmain->pmc, parent_rate);
|
|
|
+ return clk_main_recalc_rate(clkmain->regmap, parent_rate);
|
|
|
}
|
|
|
|
|
|
static const struct clk_ops rm9200_main_ops = {
|
|
@@ -427,7 +472,7 @@ static const struct clk_ops rm9200_main_ops = {
|
|
|
};
|
|
|
|
|
|
static struct clk * __init
|
|
|
-at91_clk_register_rm9200_main(struct at91_pmc *pmc,
|
|
|
+at91_clk_register_rm9200_main(struct regmap *regmap,
|
|
|
const char *name,
|
|
|
const char *parent_name)
|
|
|
{
|
|
@@ -435,7 +480,7 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc,
|
|
|
struct clk *clk = NULL;
|
|
|
struct clk_init_data init;
|
|
|
|
|
|
- if (!pmc || !name)
|
|
|
+ if (!name)
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
|
|
if (!parent_name)
|
|
@@ -452,7 +497,7 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc,
|
|
|
init.flags = 0;
|
|
|
|
|
|
clkmain->hw.init = &init;
|
|
|
- clkmain->pmc = pmc;
|
|
|
+ clkmain->regmap = regmap;
|
|
|
|
|
|
clk = clk_register(NULL, &clkmain->hw);
|
|
|
if (IS_ERR(clk))
|
|
@@ -461,22 +506,28 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc,
|
|
|
return clk;
|
|
|
}
|
|
|
|
|
|
-void __init of_at91rm9200_clk_main_setup(struct device_node *np,
|
|
|
- struct at91_pmc *pmc)
|
|
|
+static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
|
|
|
{
|
|
|
struct clk *clk;
|
|
|
const char *parent_name;
|
|
|
const char *name = np->name;
|
|
|
+ struct regmap *regmap;
|
|
|
|
|
|
parent_name = of_clk_get_parent_name(np, 0);
|
|
|
of_property_read_string(np, "clock-output-names", &name);
|
|
|
|
|
|
- clk = at91_clk_register_rm9200_main(pmc, name, parent_name);
|
|
|
+ regmap = syscon_node_to_regmap(of_get_parent(np));
|
|
|
+ if (IS_ERR(regmap))
|
|
|
+ return;
|
|
|
+
|
|
|
+ clk = at91_clk_register_rm9200_main(regmap, name, parent_name);
|
|
|
if (IS_ERR(clk))
|
|
|
return;
|
|
|
|
|
|
of_clk_add_provider(np, of_clk_src_simple_get, clk);
|
|
|
}
|
|
|
+CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
|
|
|
+ of_at91rm9200_clk_main_setup);
|
|
|
|
|
|
static irqreturn_t clk_sam9x5_main_irq_handler(int irq, void *dev_id)
|
|
|
{
|
|
@@ -488,25 +539,34 @@ static irqreturn_t clk_sam9x5_main_irq_handler(int irq, void *dev_id)
|
|
|
return IRQ_HANDLED;
|
|
|
}
|
|
|
|
|
|
+static inline bool clk_sam9x5_main_ready(struct regmap *regmap)
|
|
|
+{
|
|
|
+ unsigned int status;
|
|
|
+
|
|
|
+ regmap_read(regmap, AT91_PMC_SR, &status);
|
|
|
+
|
|
|
+ return status & AT91_PMC_MOSCSELS ? 1 : 0;
|
|
|
+}
|
|
|
+
|
|
|
static int clk_sam9x5_main_prepare(struct clk_hw *hw)
|
|
|
{
|
|
|
struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
|
|
|
- struct at91_pmc *pmc = clkmain->pmc;
|
|
|
+ struct regmap *regmap = clkmain->regmap;
|
|
|
|
|
|
- while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) {
|
|
|
+ while (!clk_sam9x5_main_ready(regmap)) {
|
|
|
enable_irq(clkmain->irq);
|
|
|
wait_event(clkmain->wait,
|
|
|
- pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS);
|
|
|
+ clk_sam9x5_main_ready(regmap));
|
|
|
}
|
|
|
|
|
|
- return clk_main_probe_frequency(pmc);
|
|
|
+ return clk_main_probe_frequency(regmap);
|
|
|
}
|
|
|
|
|
|
static int clk_sam9x5_main_is_prepared(struct clk_hw *hw)
|
|
|
{
|
|
|
struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
|
|
|
|
|
|
- return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS);
|
|
|
+ return clk_sam9x5_main_ready(clkmain->regmap);
|
|
|
}
|
|
|
|
|
|
static unsigned long clk_sam9x5_main_recalc_rate(struct clk_hw *hw,
|
|
@@ -514,29 +574,30 @@ static unsigned long clk_sam9x5_main_recalc_rate(struct clk_hw *hw,
|
|
|
{
|
|
|
struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
|
|
|
|
|
|
- return clk_main_recalc_rate(clkmain->pmc, parent_rate);
|
|
|
+ return clk_main_recalc_rate(clkmain->regmap, parent_rate);
|
|
|
}
|
|
|
|
|
|
static int clk_sam9x5_main_set_parent(struct clk_hw *hw, u8 index)
|
|
|
{
|
|
|
struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
|
|
|
- struct at91_pmc *pmc = clkmain->pmc;
|
|
|
- u32 tmp;
|
|
|
+ struct regmap *regmap = clkmain->regmap;
|
|
|
+ unsigned int tmp;
|
|
|
|
|
|
if (index > 1)
|
|
|
return -EINVAL;
|
|
|
|
|
|
- tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK;
|
|
|
+ regmap_read(regmap, AT91_CKGR_MOR, &tmp);
|
|
|
+ tmp &= ~MOR_KEY_MASK;
|
|
|
|
|
|
if (index && !(tmp & AT91_PMC_MOSCSEL))
|
|
|
- pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL);
|
|
|
+ regmap_write(regmap, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL);
|
|
|
else if (!index && (tmp & AT91_PMC_MOSCSEL))
|
|
|
- pmc_write(pmc, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL);
|
|
|
+ regmap_write(regmap, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL);
|
|
|
|
|
|
- while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) {
|
|
|
+ while (!clk_sam9x5_main_ready(regmap)) {
|
|
|
enable_irq(clkmain->irq);
|
|
|
wait_event(clkmain->wait,
|
|
|
- pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS);
|
|
|
+ clk_sam9x5_main_ready(regmap));
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
@@ -545,8 +606,11 @@ static int clk_sam9x5_main_set_parent(struct clk_hw *hw, u8 index)
|
|
|
static u8 clk_sam9x5_main_get_parent(struct clk_hw *hw)
|
|
|
{
|
|
|
struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
|
|
|
+ unsigned int status;
|
|
|
|
|
|
- return !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN);
|
|
|
+ regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
|
|
|
+
|
|
|
+ return status & AT91_PMC_MOSCEN ? 1 : 0;
|
|
|
}
|
|
|
|
|
|
static const struct clk_ops sam9x5_main_ops = {
|
|
@@ -558,7 +622,7 @@ static const struct clk_ops sam9x5_main_ops = {
|
|
|
};
|
|
|
|
|
|
static struct clk * __init
|
|
|
-at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
|
|
|
+at91_clk_register_sam9x5_main(struct regmap *regmap,
|
|
|
unsigned int irq,
|
|
|
const char *name,
|
|
|
const char **parent_names,
|
|
@@ -568,8 +632,9 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
|
|
|
struct clk_sam9x5_main *clkmain;
|
|
|
struct clk *clk = NULL;
|
|
|
struct clk_init_data init;
|
|
|
+ unsigned int status;
|
|
|
|
|
|
- if (!pmc || !irq || !name)
|
|
|
+ if (!name)
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
|
|
if (!parent_names || !num_parents)
|
|
@@ -586,10 +651,10 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
|
|
|
init.flags = CLK_SET_PARENT_GATE;
|
|
|
|
|
|
clkmain->hw.init = &init;
|
|
|
- clkmain->pmc = pmc;
|
|
|
+ clkmain->regmap = regmap;
|
|
|
clkmain->irq = irq;
|
|
|
- clkmain->parent = !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) &
|
|
|
- AT91_PMC_MOSCEN);
|
|
|
+ regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
|
|
|
+ clkmain->parent = status & AT91_PMC_MOSCEN ? 1 : 0;
|
|
|
init_waitqueue_head(&clkmain->wait);
|
|
|
irq_set_status_flags(clkmain->irq, IRQ_NOAUTOEN);
|
|
|
ret = request_irq(clkmain->irq, clk_sam9x5_main_irq_handler,
|
|
@@ -606,20 +671,23 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
|
|
|
return clk;
|
|
|
}
|
|
|
|
|
|
-void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
|
|
|
- struct at91_pmc *pmc)
|
|
|
+static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
|
|
|
{
|
|
|
struct clk *clk;
|
|
|
const char *parent_names[2];
|
|
|
int num_parents;
|
|
|
unsigned int irq;
|
|
|
const char *name = np->name;
|
|
|
+ struct regmap *regmap;
|
|
|
|
|
|
num_parents = of_clk_get_parent_count(np);
|
|
|
if (num_parents <= 0 || num_parents > 2)
|
|
|
return;
|
|
|
|
|
|
of_clk_parent_fill(np, parent_names, num_parents);
|
|
|
+ regmap = syscon_node_to_regmap(of_get_parent(np));
|
|
|
+ if (IS_ERR(regmap))
|
|
|
+ return;
|
|
|
|
|
|
of_property_read_string(np, "clock-output-names", &name);
|
|
|
|
|
@@ -627,10 +695,12 @@ void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
|
|
|
if (!irq)
|
|
|
return;
|
|
|
|
|
|
- clk = at91_clk_register_sam9x5_main(pmc, irq, name, parent_names,
|
|
|
+ clk = at91_clk_register_sam9x5_main(regmap, irq, name, parent_names,
|
|
|
num_parents);
|
|
|
if (IS_ERR(clk))
|
|
|
return;
|
|
|
|
|
|
of_clk_add_provider(np, of_clk_src_simple_get, clk);
|
|
|
}
|
|
|
+CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
|
|
|
+ of_at91sam9x5_clk_main_setup);
|